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[/] [connect-6/] [trunk/] [XILINX/] [BUILD_SCC_SRCH/] [Makefile] - Diff between revs 17 and 18

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Rev 17 Rev 18
Line 46... Line 46...
 
 
 
 
 
 
 
 
#first the c/c++ source should be compiled
#first the c/c++ source should be compiled
fpga: synth altera_synth test
fpga: synth xilinx_synth test
        cp cp ./rtl_package/synth/altera_fpga/run/DE2.sof ../DEMO
        cp cp ./rtl_package/synth/altera_fpga/run/DE2.sof ../DEMO
 
 
synth: imp_connect.tag
synth: imp_connect.tag
imp_window.tag:
imp_window.tag:
        #sed -s 's/\\TCAB_NAME/threat_window/g' main.cpp.base >main.cpp
        #sed -s 's/\\TCAB_NAME/threat_window/g' main.cpp.base >main.cpp

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