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https://opencores.org/ocsvn/core1990_interlaken/core1990_interlaken/trunk
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architecture tb_deburster of testbench_deburster is
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architecture tb_deburster of testbench_deburster is
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signal Clk : std_logic; -- Clock input
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signal Clk : std_logic; -- Clock input
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signal Reset : std_logic; -- Reset decoder
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signal Reset : std_logic; -- Reset decoder
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signal Data_In : std_logic_vector(63 downto 0); -- Data input
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signal Data_In : std_logic_vector(63 downto 0); -- Data input
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signal Deburst_En : std_logic; -- Enables the decoder
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signal Data_Out : std_logic_vector(68 downto 0); -- Decoded 64-bit output
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signal Data_Out : std_logic_vector(65 downto 0); -- Decoded 64-bit output
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signal Data_Control_In : std_logic; -- Indicates whether the word is data or control
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signal Data_Control_In : std_logic; -- Indicates whether the word is data or control
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signal Data_Control_Out : std_logic; -- Indicates whether the word is data or control
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signal CRC24_Error : std_logic;
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signal Data_Valid_In : std_logic;
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signal Data_Valid_In : std_logic;
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signal Data_Valid_Out : std_logic;
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signal Data_Valid_Out : std_logic;
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signal FIFO_Full : std_logic;
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signal FIFO_Data : std_logic_vector(4 downto 0);
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signal CRC24_Error : std_logic;
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signal FIFO_Write : std_logic;
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signal Flowcontrol : std_logic;
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constant CLK_PERIOD : time := 10 ns;
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constant CLK_PERIOD : time := 10 ns;
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begin
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begin
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uut : entity work.Burst_Deframer
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uut : entity work.Burst_Deframer
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