-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- Copyright (C) 2009, 2010 Dr. Juergen Sauermann
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-- Copyright (C) 2009, 2010 Dr. Juergen Sauermann
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--
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--
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-- This code is free software: you can redistribute it and/or modify
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-- This code is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- (at your option) any later version.
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--
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--
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-- This code is distributed in the hope that it will be useful,
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-- This code is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- GNU General Public License for more details.
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--
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--
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-- You should have received a copy of the GNU General Public License
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-- You should have received a copy of the GNU General Public License
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-- along with this code (see the file named COPYING).
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-- along with this code (see the file named COPYING).
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-- If not, see http://www.gnu.org/licenses/.
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-- If not, see http://www.gnu.org/licenses/.
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- Module Name: uart_tx - Behavioral
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-- Module Name: uart_tx - Behavioral
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-- Create Date: 14:21:59 11/07/2009
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-- Create Date: 14:21:59 11/07/2009
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-- Description: a UART receiver.
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-- Description: a UART receiver.
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--
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--
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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library IEEE;
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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entity uart_tx is
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entity uart_tx is
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port( I_CLK : in std_logic;
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port( I_CLK : in std_logic;
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I_CLR : in std_logic; -- RESET
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I_CLR : in std_logic; -- RESET
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I_CE_1 : in std_logic; -- BAUD rate clock enable
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I_CE_1 : in std_logic; -- BAUD rate clock enable
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I_DATA : in std_logic_vector(7 downto 0); -- DATA to be sent
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I_DATA : in std_logic_vector(7 downto 0); -- DATA to send
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I_FLAG : in std_logic; -- toggle to send data
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I_FLAG : in std_logic; -- toggle to send data
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Q_TX : out std_logic; -- Serial output line
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Q_TX_N : out std_logic; -- Serial output, active low
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Q_FLAG : out std_logic); -- Transmitting Flag
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Q_BUSY : out std_logic); -- Transmitter busy
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end uart_tx;
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end uart_tx;
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architecture Behavioral of uart_tx is
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architecture Behavioral of uart_tx is
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signal L_BUF : std_logic_vector(7 downto 0);
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signal L_BUF : std_logic_vector(8 downto 0);
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signal L_TODO : std_logic_vector(3 downto 0); -- bits to send
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signal L_FLAG : std_logic;
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signal L_FLAG : std_logic;
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signal L_TODO : std_logic_vector(3 downto 0); -- bits to send
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begin
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begin
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process(I_CLK)
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process(I_CLK)
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begin
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begin
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if (rising_edge(I_CLK)) then
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if (rising_edge(I_CLK)) then
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if (I_CLR = '1') then
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if (I_CLR = '1') then -- reset
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Q_TX <= '1';
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Q_TX_N <= '1';
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L_BUF <= "11111111";
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L_BUF <= "111111111";
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L_TODO <= "0000";
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L_TODO <= "0000";
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L_FLAG <= I_FLAG; -- idle
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L_FLAG <= I_FLAG;
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elsif (I_CE_1 = '1') then
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elsif (L_TODO = "0000") then -- idle
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if (L_TODO /= "0000") then -- transmitting
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if (L_FLAG /= I_FLAG) then -- new byte
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Q_TX <= L_BUF(0); -- next bit
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L_BUF <= I_DATA & '0'; -- 8 data / 1 start
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L_BUF <= '1' & L_BUF(7 downto 1);
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L_TODO <= "1100"; -- 11 bits to send
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if (L_TODO = "0001") then
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L_FLAG <= I_FLAG;
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L_FLAG <= I_FLAG;
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end if;
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end if;
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else -- shifting
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if (I_CE_1 = '1') then
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Q_TX_N <= L_BUF(0);
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L_BUF <= '1' & L_BUF(8 downto 1);
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L_TODO <= L_TODO - "0001";
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L_TODO <= L_TODO - "0001";
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elsif (L_FLAG /= I_FLAG) then -- new byte
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Q_TX <= '0'; -- start bit
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L_BUF <= I_DATA; -- data bits
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L_TODO <= "1001";
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end if;
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end if;
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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Q_FLAG <= L_FLAG;
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Q_BUSY <= '0' when (L_TODO = "0000") else '1';
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end Behavioral;
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end Behavioral;
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