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----------------------------------------------------------------------------------
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-- Company:
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-- Copyright (c) 2013 Antonio de la Piedra
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-- Engineer:
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--
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-- This program is free software: you can redistribute it and/or modify
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-- Create Date: 12:52:29 02/20/2013
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-- it under the terms of the GNU General Public License as published by
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-- Design Name:
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-- the Free Software Foundation, either version 3 of the License, or
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-- Module Name: des_round - Behavioral
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-- (at your option) any later version.
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-- Project Name:
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-- Target Devices:
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-- This program is distributed in the hope that it will be useful,
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-- Tool versions:
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- Description:
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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--
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-- GNU General Public License for more details.
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-- Dependencies:
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--
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-- You should have received a copy of the GNU General Public License
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-- Revision:
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-- along with this program. If not, see <http://www.gnu.org/licenses/>.
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-- Revision 0.01 - File Created
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-- Additional Comments:
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--
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----------------------------------------------------------------------------------
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library IEEE;
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_1164.ALL;
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-- Uncomment the following library declaration if using
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-- arithmetic functions with Signed or Unsigned values
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--use IEEE.NUMERIC_STD.ALL;
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-- Uncomment the following library declaration if instantiating
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-- any Xilinx primitives in this code.
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--library UNISIM;
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--use UNISIM.VComponents.all;
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entity des_round is
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entity des_round is
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port(clk : in std_logic;
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port(clk : in std_logic;
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l_0 : in std_logic_vector(31 downto 0);
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l_0 : in std_logic_vector(31 downto 0);
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r_0 : in std_logic_vector(31 downto 0);
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r_0 : in std_logic_vector(31 downto 0);
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k_i : in std_logic_vector(47 downto 0);
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k_i : in std_logic_vector(47 downto 0);
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F_FUN_0 : f_fun port map (clk, r_0, k_i, f_out_s);
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F_FUN_0 : f_fun port map (clk, r_0, k_i, f_out_s);
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l_1 <= r_0;
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l_1 <= r_0;
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r_1 <= l_0 xor f_out_s;
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r_1 <= l_0 xor f_out_s;
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-- DSP_XOR_0 : dsp_xor port map (clk, l_0, f_out_s, r_1);
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end Behavioral;
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end Behavioral;
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