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https://opencores.org/ocsvn/dma_axi/dma_axi/trunk
[/] [dma_axi/] [trunk/] [README.txt] - Diff between revs 2 and 3
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We will be very happy to receive any kind of feedback regarding our tools and cores.
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We will also be willing to support any company intending to integrate our cores into their project.
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For any questions / remarks / suggestions / bugs please contact info@provartec.com.
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Opencores.org project - DMA AXI
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Opencores.org project - DMA AXI
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This core is based on the Provartec PR200 IP - 'Generic High performance dual-core AXI DMA'
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This core is based on the Provartec PR200 IP - 'Generic High performance dual-core AXI DMA'
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The original IP is a configurable, generic AXI DMA written in RobustVerilog.
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The original IP is a configurable, generic AXI DMA written in RobustVerilog.
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This project contains two Verilog cores, one a 32-bit build and the other a 64-bit build.
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This project contains two Verilog cores, one a 32-bit build and the other a 64-bit build.
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To view the complete IP - http://www.provartec.com/ipproducts/56
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To view the complete IP - http://www.provartec.com/ipproducts/56
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For any questions / remarks / suggestions / bugs please contact info@provartec.com.
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