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/////////////////////////////////////////////////////////////////////
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//// ////
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//// FPU ////
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//// Floating Point Unit (Double precision) ////
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//// ////
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//// Author: David Lundgren ////
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//// davidklun@gmail.com ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2009 David Lundgren ////
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//// davidklun@gmail.com ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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//// ////
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//// THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ////
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//// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ////
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//// POSSIBILITY OF SUCH DAMAGE. ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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`timescale 1ns / 100ps
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module fpu_add( clk, rst, enable, opa, opb, sign, sum_2, exponent_2);
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input clk;
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input rst;
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input enable;
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input [63:0] opa, opb;
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output sign;
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output [55:0] sum_2;
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output [10:0] exponent_2;
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reg sign;
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reg [10:0] exponent_a;
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reg [10:0] exponent_b;
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reg [51:0] mantissa_a;
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reg [51:0] mantissa_b;
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reg expa_gt_expb;
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reg [10:0] exponent_small;
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reg [10:0] exponent_large;
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reg [51:0] mantissa_small;
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reg [51:0] mantissa_large;
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reg small_is_denorm;
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reg large_is_denorm;
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reg large_norm_small_denorm;
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reg [10:0] exponent_diff;
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reg [55:0] large_add;
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reg [55:0] small_add;
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reg [55:0] small_shift;
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wire small_shift_nonzero = |small_shift[55:0];
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wire small_is_nonzero = (exponent_small > 0) | |mantissa_small[51:0];
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wire small_fraction_enable = small_is_nonzero & !small_shift_nonzero;
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wire [55:0] small_shift_2 = { 55'b0, 1'b1 };
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reg [55:0] small_shift_3;
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reg [55:0] sum;
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wire sum_overflow = sum[55]; // sum[55] will be 0 if there was no carry from adding the 2 numbers
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reg [55:0] sum_2;
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reg [10:0] exponent;
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wire sum_leading_one = sum_2[54]; // this is where the leading one resides, unless denorm
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reg denorm_to_norm;
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reg [10:0] exponent_2;
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always @(posedge clk)
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begin
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if (rst) begin
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sign <= 0;
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exponent_a <= 0;
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exponent_b <= 0;
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mantissa_a <= 0;
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mantissa_b <= 0;
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expa_gt_expb <= 0;
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exponent_small <= 0;
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exponent_large <= 0;
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mantissa_small <= 0;
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mantissa_large <= 0;
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small_is_denorm <= 0;
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large_is_denorm <= 0;
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large_norm_small_denorm <= 0;
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exponent_diff <= 0;
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large_add <= 0;
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small_add <= 0;
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small_shift <= 0;
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small_shift_3 <= 0;
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sum <= 0;
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sum_2 <= 0;
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exponent <= 0;
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denorm_to_norm <= 0;
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exponent_2 <= 0;
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end
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else if (enable) begin
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sign <= opa[63];
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exponent_a <= opa[62:52];
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exponent_b <= opb[62:52];
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mantissa_a <= opa[51:0];
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mantissa_b <= opb[51:0];
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expa_gt_expb <= exponent_a > exponent_b;
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exponent_small <= expa_gt_expb ? exponent_b : exponent_a;
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exponent_large <= expa_gt_expb ? exponent_a : exponent_b;
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mantissa_small <= expa_gt_expb ? mantissa_b : mantissa_a;
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mantissa_large <= expa_gt_expb ? mantissa_a : mantissa_b;
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small_is_denorm <= !(exponent_small > 0);
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large_is_denorm <= !(exponent_large > 0);
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large_norm_small_denorm <= (small_is_denorm && !large_is_denorm);
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exponent_diff <= exponent_large - exponent_small - large_norm_small_denorm;
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large_add <= { 1'b0, !large_is_denorm, mantissa_large, 2'b0 };
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small_add <= { 1'b0, !small_is_denorm, mantissa_small, 2'b0 };
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small_shift <= small_add >> exponent_diff;
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small_shift_3 <= small_fraction_enable ? small_shift_2 : small_shift;
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sum <= large_add + small_shift_3;
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sum_2 <= sum_overflow ? sum >> 1 : sum;
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exponent <= sum_overflow ? exponent_large + 1: exponent_large;
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denorm_to_norm <= sum_leading_one & large_is_denorm;
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exponent_2 <= denorm_to_norm ? exponent + 1 : exponent;
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end
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end
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endmodule
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