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[/] [esoc/] [trunk/] [Sources/] [logixa/] [esoc_port_processor_inbound.vhd] - Diff between revs 42 and 53

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----                                                                        ----
--
---- Ethernet Switch on Configurable Logic IP Core                          ----
-- This VHDL file was generated by EASE/HDL 7.4 Revision 4 from HDL Works B.V.
----                                                                        ----
--
---- This file is part of the ESoCL project                                 ----
-- Ease library  : work
---- http://www.opencores.org/cores/esoc/                                   ----
-- HDL library   : work
----                                                                        ----
-- Host name     : S212065
---- Description: see design description ESoCL_dd_71022001.pdf              ----
-- User name     : df768
----                                                                        ----
-- Time stamp    : Tue Aug 19 08:05:18 2014
---- To Do: see roadmap description ESoCL_dd_71022001.pdf                   ----
--
----        and/or release bulleting ESoCL_rb_71022001.pdf                  ----
-- Designed by   : L.Maarsen
----                                                                        ----
-- Company       : LogiXA
---- Author(s): L.Maarsen                                                   ----
-- Project info  : eSoC
---- Bert Maarsen, lmaarsen@opencores.org                                   ----
--
----                                                                        ----
 
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----                                                                        ----
 
---- Copyright (C) 2009 Authors and OPENCORES.ORG                           ----
 
----                                                                        ----
 
---- This source file may be used and distributed without                   ----
 
---- restriction provided that this copyright statement is not              ----
 
---- removed from the file and that any derivative work contains            ----
 
---- the original copyright notice and the associated disclaimer.           ----
 
----                                                                        ----
 
---- This source file is free software; you can redistribute it             ----
 
---- and/or modify it under the terms of the GNU Lesser General             ----
 
---- Public License as published by the Free Software Foundation;           ----
 
---- either version 2.1 of the License, or (at your option) any             ----
 
---- later version.                                                         ----
 
----                                                                        ----
 
---- This source is distributed in the hope that it will be                 ----
 
---- useful, but WITHOUT ANY WARRANTY; without even the implied             ----
 
---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR                ----
 
---- PURPOSE. See the GNU Lesser General Public License for more            ----
 
---- details.                                                               ----
 
----                                                                        ----
 
---- You should have received a copy of the GNU Lesser General              ----
 
---- Public License along with this source; if not, download it             ----
 
---- from http://www.opencores.org/lgpl.shtml                               ----
 
----                                                                        ----
 
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-- Object        : Entity work.esoc_port_processor_inbound
-- Object        : Entity work.esoc_port_processor_inbound
-- Last modified : Mon Apr 14 12:49:30 2014.
-- Last modified : Mon Apr 14 12:49:30 2014.
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