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[/] [ethmac/] [tags/] [rel_11/] [bench/] [verilog/] [tb_ethernet.v] - Diff between revs 169 and 170

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Rev 169 Rev 170
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////  This file is part of the Ethernet IP core project           ////
////  This file is part of the Ethernet IP core project           ////
////  http://www.opencores.org/projects/ethmac/                   ////
////  http://www.opencores.org/projects/ethmac/                   ////
////                                                              ////
////                                                              ////
////  Author(s):                                                  ////
////  Author(s):                                                  ////
////      - Tadej Markovic, tadej@opencores.org                   ////
////      - Tadej Markovic, tadej@opencores.org                   ////
 
////      - Igor Mohor,     igormM@opencores.org                  ////
////                                                              ////
////                                                              ////
////  All additional information is available in the Readme.txt   ////
////  All additional information is available in the Readme.txt   ////
////  file.                                                       ////
////  file.                                                       ////
////                                                              ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.6  2002/09/13 11:57:20  mohor
 
// New testbench. Thanks to Tadej M - "The Spammer".
 
//
// Revision 1.2  2002/07/19 14:02:47  mohor
// Revision 1.2  2002/07/19 14:02:47  mohor
// Clock mrx_clk set to 2.5 MHz.
// Clock mrx_clk set to 2.5 MHz.
//
//
// Revision 1.1  2002/07/19 13:57:53  mohor
// Revision 1.1  2002/07/19 13:57:53  mohor
// Testing environment also includes traffic cop, memory interface and host
// Testing environment also includes traffic cop, memory interface and host

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