| Line 39... |
Line 39... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.28 2002/11/15 14:27:15 mohor
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// Since r_Rst bit is not used any more, default value is changed to 0xa000.
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//
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// Revision 1.27 2002/11/01 18:19:34 mohor
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// Revision 1.27 2002/11/01 18:19:34 mohor
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// Defines fixed to use generic RAM by default.
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// Defines fixed to use generic RAM by default.
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//
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//
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// Revision 1.26 2002/10/24 18:53:03 mohor
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// Revision 1.26 2002/10/24 18:53:03 mohor
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// fpga define added.
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// fpga define added.
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| Line 222... |
Line 225... |
`define ETH_IPGR1_WIDTH 7
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`define ETH_IPGR1_WIDTH 7
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`define ETH_IPGR2_WIDTH 7
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`define ETH_IPGR2_WIDTH 7
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`define ETH_PACKETLEN_WIDTH 32
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`define ETH_PACKETLEN_WIDTH 32
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`define ETH_TX_BD_NUM_WIDTH 8
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`define ETH_TX_BD_NUM_WIDTH 8
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`define ETH_CTRLMODER_WIDTH 3
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`define ETH_CTRLMODER_WIDTH 3
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`define ETH_MIIMODER_WIDTH 10
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`define ETH_MIIMODER_WIDTH 9
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`define ETH_MIITX_DATA_WIDTH 16
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`define ETH_MIITX_DATA_WIDTH 16
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`define ETH_MIIRX_DATA_WIDTH 16
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`define ETH_MIIRX_DATA_WIDTH 16
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`define ETH_MIISTATUS_WIDTH 3
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`define ETH_MIISTATUS_WIDTH 3
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`define ETH_MAC_ADDR0_WIDTH 32
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`define ETH_MAC_ADDR0_WIDTH 32
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`define ETH_MAC_ADDR1_WIDTH 16
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`define ETH_MAC_ADDR1_WIDTH 16
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