| Line 39... |
Line 39... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
// CVS Revision History
|
// CVS Revision History
|
//
|
//
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.8 2002/02/05 16:44:38 mohor
|
|
// Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200
|
|
// MHz. Statuses, overrun, control frame transmission and reception still need
|
|
// to be fixed.
|
|
//
|
// Revision 1.7 2002/01/23 10:28:16 mohor
|
// Revision 1.7 2002/01/23 10:28:16 mohor
|
// Link in the header changed.
|
// Link in the header changed.
|
//
|
//
|
// Revision 1.6 2001/12/05 15:00:16 mohor
|
// Revision 1.6 2001/12/05 15:00:16 mohor
|
// RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
|
// RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
|
| Line 119... |
Line 124... |
`define ETH_INT_MASK_DEF 32'h00000000
|
`define ETH_INT_MASK_DEF 32'h00000000
|
`define ETH_IPGT_DEF 32'h00000012
|
`define ETH_IPGT_DEF 32'h00000012
|
`define ETH_IPGR1_DEF 32'h0000000C
|
`define ETH_IPGR1_DEF 32'h0000000C
|
`define ETH_IPGR2_DEF 32'h00000012
|
`define ETH_IPGR2_DEF 32'h00000012
|
`define ETH_PACKETLEN_DEF 32'h003C0600
|
`define ETH_PACKETLEN_DEF 32'h003C0600
|
`define ETH_COLLCONF_DEF 32'h000F0040
|
`define ETH_COLLCONF_DEF 32'h000F003f
|
`define ETH_CTRLMODER_DEF 32'h00000000
|
`define ETH_CTRLMODER_DEF 32'h00000000
|
`define ETH_MIIMODER_DEF 32'h00000064
|
`define ETH_MIIMODER_DEF 32'h00000064
|
`define ETH_MIICOMMAND_DEF 32'h00000000
|
`define ETH_MIICOMMAND_DEF 32'h00000000
|
`define ETH_MIIADDRESS_DEF 32'h00000000
|
`define ETH_MIIADDRESS_DEF 32'h00000000
|
`define ETH_MIITX_DATA_DEF 32'h00000000
|
`define ETH_MIITX_DATA_DEF 32'h00000000
|
