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Line 39... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.4 2002/01/23 10:28:16 mohor
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// Link in the header changed.
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//
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// Revision 1.3 2001/10/19 08:43:51 mohor
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// Revision 1.3 2001/10/19 08:43:51 mohor
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// eth_timescale.v changed to timescale.v This is done because of the
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// eth_timescale.v changed to timescale.v This is done because of the
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// simulation of the few cores in a one joined project.
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// simulation of the few cores in a one joined project.
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//
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//
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// Revision 1.2 2001/09/11 14:17:00 mohor
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// Revision 1.2 2001/09/11 14:17:00 mohor
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Line 71... |
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`include "timescale.v"
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`include "timescale.v"
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module eth_macstatus(
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module eth_macstatus(
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MRxClk, Reset, ReceivedLengthOK, ReceiveEnd, TransmitEnd, ReceivedPacketGood, RxCrcError,
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MRxClk, Reset, ReceivedLengthOK, ReceiveEnd, ReceivedPacketGood, RxCrcError,
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MRxErr, MRxDV, RxStateSFD, RxStateData, RxStatePreamble, RxStateIdle, Transmitting,
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MRxErr, MRxDV, RxStateSFD, RxStateData, RxStatePreamble, RxStateIdle, Transmitting,
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RxByteCnt, RxByteCntEq0, RxByteCntGreat2, RxByteCntMaxFrame, ReceivedPauseFrm
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RxByteCnt, RxByteCntEq0, RxByteCntGreat2, RxByteCntMaxFrame, ReceivedPauseFrm,
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InvalidSymbol, MRxD, LatchedCrcError, Collision, CollValid, RxLateCollision,
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r_RecSmall, r_MinFL, r_MaxFL, ShortFrame, DribbleNibble, ReceivedPacketTooBig, r_HugEn,
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LoadRxStatus
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);
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);
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parameter Tp = 1;
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parameter Tp = 1;
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Line 100... |
input [15:0] RxByteCnt;
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input [15:0] RxByteCnt;
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input RxByteCntEq0;
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input RxByteCntEq0;
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input RxByteCntGreat2;
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input RxByteCntGreat2;
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input RxByteCntMaxFrame;
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input RxByteCntMaxFrame;
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input ReceivedPauseFrm;
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input ReceivedPauseFrm;
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input [3:0] MRxD;
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input Collision;
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input [5:0] CollValid;
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input r_RecSmall;
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input [15:0] r_MinFL;
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input [15:0] r_MaxFL;
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input r_HugEn;
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output ReceivedLengthOK;
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output ReceivedLengthOK;
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output ReceiveEnd;
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output ReceiveEnd;
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output ReceivedPacketGood;
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output ReceivedPacketGood;
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output TransmitEnd;
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output InvalidSymbol;
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output LatchedCrcError;
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output RxLateCollision;
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output ShortFrame;
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output DribbleNibble;
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output ReceivedPacketTooBig;
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output LoadRxStatus;
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reg ReceiveEnd;
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reg ReceiveEnd;
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reg LatchedCrcError;
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reg LatchedCrcError;
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reg LatchedMRxErr;
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reg LatchedMRxErr;
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reg PreloadRxStatus;
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reg LoadRxStatus;
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reg [15:0] LatchedRxByteCnt;
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reg InvalidSymbol;
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wire TakeSample;
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wire TakeSample;
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wire SetInvalidSymbol; // Invalid symbol was received during reception in 100Mbps
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// Crc error
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// Crc error
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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LatchedCrcError <=#Tp 1'b0;
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LatchedCrcError <=#Tp 1'b0;
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else
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else
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begin
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if(RxStateSFD)
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if(RxStateSFD)
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LatchedCrcError <=#Tp 1'b0;
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LatchedCrcError <=#Tp 1'b0;
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else
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else
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if(RxStateData[0])
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if(RxStateData[0])
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LatchedCrcError <=#Tp RxCrcError & ~RxByteCntEq0;
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LatchedCrcError <=#Tp RxCrcError & ~RxByteCntEq0;
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end
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end
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end
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// LatchedMRxErr
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// LatchedMRxErr
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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Line 162... |
// ReceivedPacketGood
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// ReceivedPacketGood
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assign ReceivedPacketGood = ~LatchedCrcError & ~LatchedMRxErr;
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assign ReceivedPacketGood = ~LatchedCrcError & ~LatchedMRxErr;
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// ReceivedLengthOK
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// ReceivedLengthOK
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assign ReceivedLengthOK = LatchedRxByteCnt[15:0] > 63 & LatchedRxByteCnt[15:0] < 1519;
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assign ReceivedLengthOK = RxByteCnt[15:0] > 63 & RxByteCnt[15:0] < 1519;
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// LatchedRxByteCnt[15:0]
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// Time to take a sample
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assign TakeSample = |RxStateData & ~MRxDV & RxByteCntGreat2 |
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RxStateData[0] & MRxDV & RxByteCntMaxFrame;
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// LoadRxStatus
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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LatchedRxByteCnt[15:0] <=#Tp 16'h0;
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LoadRxStatus <=#Tp 1'b0;
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else
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else
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LoadRxStatus <=#Tp TakeSample;
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end
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// ReceiveEnd
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(RxStateSFD)
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if(Reset)
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LatchedRxByteCnt[15:0] <=#Tp RxByteCnt[15:0];
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ReceiveEnd <=#Tp 1'b0;
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else
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else
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if(RxStateData[0])
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ReceiveEnd <=#Tp LoadRxStatus;
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LatchedRxByteCnt[15:0] <=#Tp RxByteCnt[15:0];
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end
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end
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end
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// Invalid Symbol received during 100Mbps mode
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assign SetInvalidSymbol = MRxDV & MRxErr & ~LatchedMRxErr & MRxD[3:0] == 4'he;
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// Time to take a sample
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assign TakeSample = |RxStateData & ~MRxDV & RxByteCntGreat2 |
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// InvalidSymbol
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RxStateData[0] & MRxDV & RxByteCntMaxFrame;
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always @ (posedge MRxClk or posedge Reset)
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begin
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if(Reset)
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InvalidSymbol <=#Tp 1'b0;
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else
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if(LoadRxStatus & ~SetInvalidSymbol)
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InvalidSymbol <=#Tp 1'b0;
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else
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if(SetInvalidSymbol)
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InvalidSymbol <=#Tp 1'b1;
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end
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// PreloadRxStatus
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// Late Collision
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reg RxLateCollision;
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reg RxColWindow;
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// Collision Window
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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PreloadRxStatus <=#Tp 1'b0;
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RxLateCollision <=#Tp 1'b0;
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else
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if(LoadRxStatus)
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RxLateCollision <=#Tp 1'b0;
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else
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else
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PreloadRxStatus <=#Tp TakeSample;
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if(Collision & (~RxColWindow | r_RecSmall))
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RxLateCollision <=#Tp 1'b1;
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end
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end
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// Collision Window
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always @ (posedge MRxClk or posedge Reset)
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begin
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if(Reset)
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RxColWindow <=#Tp 1'b1;
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else
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if(~Collision & RxByteCnt[5:0] == CollValid[5:0] & RxStateData[1])
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RxColWindow <=#Tp 1'b0;
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else
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if(RxStateIdle)
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RxColWindow <=#Tp 1'b1;
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end
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// ReceiveEnd
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// ShortFrame
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reg ShortFrame;
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always @ (posedge MRxClk or posedge Reset)
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always @ (posedge MRxClk or posedge Reset)
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begin
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begin
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if(Reset)
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if(Reset)
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ReceiveEnd <=#Tp 1'b0;
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ShortFrame <=#Tp 1'b0;
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else
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else
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ReceiveEnd <=#Tp PreloadRxStatus;
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if(LoadRxStatus)
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ShortFrame <=#Tp 1'b0;
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else
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if(TakeSample)
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ShortFrame <=#Tp r_RecSmall & RxByteCnt[15:0] < r_MinFL[15:0];
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end
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end
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// DribbleNibble
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reg DribbleNibble;
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always @ (posedge MRxClk or posedge Reset)
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begin
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if(Reset)
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DribbleNibble <=#Tp 1'b0;
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else
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if(RxStateSFD)
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DribbleNibble <=#Tp 1'b0;
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else
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if(~MRxDV & RxStateData[1])
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DribbleNibble <=#Tp 1'b1;
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end
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reg ReceivedPacketTooBig;
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assign ReceivedLengthOK = RxByteCnt[15:0] > 63 & RxByteCnt[15:0] < 1519;
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always @ (posedge MRxClk or posedge Reset)
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begin
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if(Reset)
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ReceivedPacketTooBig <=#Tp 1'b0;
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else
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if(LoadRxStatus)
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ReceivedPacketTooBig <=#Tp 1'b0;
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else
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if(TakeSample)
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ReceivedPacketTooBig <=#Tp ~r_HugEn & RxByteCnt[15:0] > r_MaxFL[15:0];
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end
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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