OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_19/] [rtl/] [verilog/] [eth_defines.v] - Diff between revs 238 and 246

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 238 Rev 246
Line 39... Line 39...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.27  2002/11/01 18:19:34  mohor
 
// Defines fixed to use generic RAM by default.
 
//
// Revision 1.26  2002/10/24 18:53:03  mohor
// Revision 1.26  2002/10/24 18:53:03  mohor
// fpga define added.
// fpga define added.
//
//
// Revision 1.3  2002/10/11 16:57:54  igorm
// Revision 1.3  2002/10/11 16:57:54  igorm
// eth_defines.v tagged with rel_5 used.
// eth_defines.v tagged with rel_5 used.
Line 187... Line 190...
`define ETH_HASH1_ADR         8'h13   // 0x4C
`define ETH_HASH1_ADR         8'h13   // 0x4C
`define ETH_TX_CTRL_ADR       8'h14   // 0x50
`define ETH_TX_CTRL_ADR       8'h14   // 0x50
`define ETH_RX_CTRL_ADR       8'h15   // 0x54
`define ETH_RX_CTRL_ADR       8'h15   // 0x54
 
 
 
 
`define ETH_MODER_DEF         17'h0A800
`define ETH_MODER_DEF         17'h0A000
`define ETH_INT_MASK_DEF      7'h0
`define ETH_INT_MASK_DEF      7'h0
`define ETH_IPGT_DEF          7'h12
`define ETH_IPGT_DEF          7'h12
`define ETH_IPGR1_DEF         7'h0C
`define ETH_IPGR1_DEF         7'h0C
`define ETH_IPGR2_DEF         7'h12
`define ETH_IPGR2_DEF         7'h12
`define ETH_PACKETLEN_DEF     32'h00400600
`define ETH_PACKETLEN_DEF     32'h00400600

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.