OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_19/] [rtl/] [verilog/] [eth_defines.v] - Diff between revs 68 and 73

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 68 Rev 73
Line 39... Line 39...
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.14  2002/02/16 14:03:44  mohor
 
// Registered trimmed. Unused registers removed.
 
//
// Revision 1.13  2002/02/16 13:06:33  mohor
// Revision 1.13  2002/02/16 13:06:33  mohor
// EXTERNAL_DMA used instead of WISHBONE_DMA.
// EXTERNAL_DMA used instead of WISHBONE_DMA.
//
//
// Revision 1.12  2002/02/15 10:58:31  mohor
// Revision 1.12  2002/02/15 10:58:31  mohor
// Changed that were lost with last update put back to the file.
// Changed that were lost with last update put back to the file.
Line 136... Line 139...
`define ETH_HASH1_ADR         8'h13   // 0x4C
`define ETH_HASH1_ADR         8'h13   // 0x4C
 
 
 
 
`define ETH_MODER_DEF         17'h0A800
`define ETH_MODER_DEF         17'h0A800
`define ETH_INT_SOURCE_DEF    32'h00000000
`define ETH_INT_SOURCE_DEF    32'h00000000
`define ETH_INT_MASK_DEF      5'h0
`define ETH_INT_MASK_DEF      7'h0
`define ETH_IPGT_DEF          7'h12
`define ETH_IPGT_DEF          7'h12
`define ETH_IPGR1_DEF         7'h0C
`define ETH_IPGR1_DEF         7'h0C
`define ETH_IPGR2_DEF         7'h12
`define ETH_IPGR2_DEF         7'h12
`define ETH_PACKETLEN_DEF     32'h003C0600
`define ETH_PACKETLEN_DEF     32'h003C0600
`define ETH_COLLCONF0_DEF     6'h3f
`define ETH_COLLCONF0_DEF     6'h3f

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.