| Line 39... |
Line 39... |
//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.10 2002/02/06 14:10:21 mohor
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// non-DMA host interface added. Select the right configutation in eth_defines.
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//
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// Revision 1.9 2002/01/23 10:28:16 mohor
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// Revision 1.9 2002/01/23 10:28:16 mohor
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// Link in the header changed.
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// Link in the header changed.
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//
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//
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// Revision 1.8 2001/12/05 15:00:16 mohor
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// Revision 1.8 2001/12/05 15:00:16 mohor
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// RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
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// RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
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| Line 217... |
Line 220... |
wire [7:0] TxData;
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wire [7:0] TxData;
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wire TxRetry;
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wire TxRetry;
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wire TxAbort;
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wire TxAbort;
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wire TxUnderRun;
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wire TxUnderRun;
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wire TxDone;
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wire TxDone;
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wire [5:0] CollValid;
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// Connecting Miim module
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// Connecting Miim module
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| Line 239... |
Line 243... |
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wire RegCs; // Connected to registers
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wire RegCs; // Connected to registers
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wire [31:0] RegDataOut; // Multiplexed to wb_dat_o
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wire [31:0] RegDataOut; // Multiplexed to wb_dat_o
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wire r_DmaEn; // DMA enable
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wire r_DmaEn; // DMA enable
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wire r_RecSmall; // Receive small frames
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wire r_Rst; // Reset
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wire r_Rst; // Reset
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wire r_LoopBck; // Loopback
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wire r_LoopBck; // Loopback
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wire r_TxEn; // Tx Enable
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wire r_TxEn; // Tx Enable
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wire r_RxEn; // Rx Enable
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wire r_RxEn; // Rx Enable
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| Line 253... |
Line 258... |
wire r_HugEn; // Huge packet enable
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wire r_HugEn; // Huge packet enable
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wire r_DlyCrcEn; // Delayed CRC enabled
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wire r_DlyCrcEn; // Delayed CRC enabled
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wire [15:0] r_MaxFL; // Maximum frame length
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wire [15:0] r_MaxFL; // Maximum frame length
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wire [15:0] r_MinFL; // Minimum frame length
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wire [15:0] r_MinFL; // Minimum frame length
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wire ShortFrame;
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wire DribbleNibble; // Extra nibble received
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wire ReceivedPacketTooBig; // Received packet is too big
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wire [47:0] r_MAC; // MAC address
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wire [47:0] r_MAC; // MAC address
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wire LoadRxStatus; // Rx status was loaded
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wire [7:0] r_TxBDNum; // Receive buffer descriptor number
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wire [7:0] r_TxBDNum; // Receive buffer descriptor number
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wire [6:0] r_IPGT; //
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wire [6:0] r_IPGT; //
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wire [6:0] r_IPGR1; //
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wire [6:0] r_IPGR1; //
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wire [6:0] r_IPGR2; //
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wire [6:0] r_IPGR2; //
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| Line 299... |
Line 308... |
// Connecting Ethernet registers
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// Connecting Ethernet registers
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eth_registers ethreg1
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eth_registers ethreg1
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(
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(
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.DataIn(wb_dat_i), .Address(wb_adr_i[7:2]), .Rw(wb_we_i),
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.DataIn(wb_dat_i), .Address(wb_adr_i[7:2]), .Rw(wb_we_i),
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.Cs(RegCs), .Clk(wb_clk_i), .Reset(wb_rst_i),
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.Cs(RegCs), .Clk(wb_clk_i), .Reset(wb_rst_i),
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.DataOut(RegDataOut), .r_DmaEn(r_DmaEn), .r_RecSmall(),
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.DataOut(RegDataOut), .r_DmaEn(r_DmaEn), .r_RecSmall(r_RecSmall),
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.r_Pad(r_Pad), .r_HugEn(r_HugEn), .r_CrcEn(r_CrcEn),
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.r_Pad(r_Pad), .r_HugEn(r_HugEn), .r_CrcEn(r_CrcEn),
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.r_DlyCrcEn(r_DlyCrcEn), .r_Rst(r_Rst), .r_FullD(r_FullD),
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.r_DlyCrcEn(r_DlyCrcEn), .r_Rst(r_Rst), .r_FullD(r_FullD),
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.r_ExDfrEn(r_ExDfrEn), .r_NoBckof(r_NoBckof), .r_LoopBck(r_LoopBck),
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.r_ExDfrEn(r_ExDfrEn), .r_NoBckof(r_NoBckof), .r_LoopBck(r_LoopBck),
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.r_IFG(r_IFG), .r_Pro(), .r_Iam(),
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.r_IFG(r_IFG), .r_Pro(), .r_Iam(),
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.r_Bro(), .r_NoPre(r_NoPre), .r_TxEn(r_TxEn),
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.r_Bro(), .r_NoPre(r_NoPre), .r_TxEn(r_TxEn),
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| Line 337... |
Line 346... |
wire TxCtrlEndFrm;
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wire TxCtrlEndFrm;
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wire ReceivedPauseFrm;
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wire ReceivedPauseFrm;
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wire ReceiveEnd;
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wire ReceiveEnd;
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wire ReceivedPacketGood;
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wire ReceivedPacketGood;
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wire ReceivedLengthOK;
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wire ReceivedLengthOK;
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wire InvalidSymbol;
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wire LatchedCrcError;
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wire RxLateCollision;
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// Connecting MACControl
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// Connecting MACControl
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eth_maccontrol maccontrol1
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eth_maccontrol maccontrol1
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(
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(
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.MTxClk(mtx_clk_pad_i), .TPauseRq(TPauseRq),
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.MTxClk(mtx_clk_pad_i), .TPauseRq(TPauseRq),
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| Line 560... |
Line 572... |
.PerPacketCrcEn(PerPacketCrcEn), .PerPacketPad(PerPacketPad), .WillSendControlFrame(WillSendControlFrame),
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.PerPacketCrcEn(PerPacketCrcEn), .PerPacketPad(PerPacketPad), .WillSendControlFrame(WillSendControlFrame),
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.TxCtrlEndFrm(TxCtrlEndFrm),
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.TxCtrlEndFrm(TxCtrlEndFrm),
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// Register
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// Register
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.r_TxEn(r_TxEn), .r_RxEn(r_RxEn), .r_TxBDNum(r_TxBDNum),
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.r_TxEn(r_TxEn), .r_RxEn(r_RxEn), .r_TxBDNum(r_TxBDNum),
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.r_DmaEn(r_DmaEn), .TX_BD_NUM_Wr(TX_BD_NUM_Wr),
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.r_DmaEn(r_DmaEn), .TX_BD_NUM_Wr(TX_BD_NUM_Wr), .r_RecSmall(r_RecSmall),
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//RX
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//RX
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.MRxClk(mrx_clk_pad_i), .RxData(RxData), .RxValid(RxValid),
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.MRxClk(mrx_clk_pad_i), .RxData(RxData), .RxValid(RxValid),
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.RxStartFrm(RxStartFrm), .RxEndFrm(RxEndFrm),
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.RxStartFrm(RxStartFrm), .RxEndFrm(RxEndFrm),
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.Busy_IRQ(Busy_IRQ), .RxF_IRQ(RxF_IRQ), .RxB_IRQ(RxB_IRQ),
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.Busy_IRQ(Busy_IRQ), .RxF_IRQ(RxF_IRQ), .RxB_IRQ(RxB_IRQ),
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.TxE_IRQ(TxE_IRQ), .TxB_IRQ(TxB_IRQ)
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.TxE_IRQ(TxE_IRQ), .TxB_IRQ(TxB_IRQ),
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`ifdef WISHBONE_DMA
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`ifdef WISHBONE_DMA
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`else
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`else
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,
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.RxAbort(RxAbort),
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.RxAbort(RxAbort)
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`endif
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`endif
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.InvalidSymbol(InvalidSymbol), .LatchedCrcError(LatchedCrcError), .RxLength(RxByteCnt),
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.RxLateCollision(RxLateCollision), .ShortFrame(ShortFrame), .DribbleNibble(DribbleNibble),
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.ReceivedPacketTooBig(ReceivedPacketTooBig), .LoadRxStatus(LoadRxStatus)
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);
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);
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// Connecting MacStatus module
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// Connecting MacStatus module
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eth_macstatus macstatus1
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eth_macstatus macstatus1
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(
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(
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.MRxClk(mrx_clk_pad_i), .Reset(r_Rst), .TransmitEnd(),
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.MRxClk(mrx_clk_pad_i), .Reset(r_Rst),
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.ReceiveEnd(ReceiveEnd), .ReceivedPacketGood(ReceivedPacketGood), .ReceivedLengthOK(ReceivedLengthOK),
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.ReceiveEnd(ReceiveEnd), .ReceivedPacketGood(ReceivedPacketGood), .ReceivedLengthOK(ReceivedLengthOK),
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.RxCrcError(RxCrcError), .MRxErr(MRxErr_Lb), .MRxDV(MRxDV_Lb),
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.RxCrcError(RxCrcError), .MRxErr(MRxErr_Lb), .MRxDV(MRxDV_Lb),
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.RxStateSFD(RxStateSFD), .RxStateData(RxStateData), .RxStatePreamble(RxStatePreamble),
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.RxStateSFD(RxStateSFD), .RxStateData(RxStateData), .RxStatePreamble(RxStatePreamble),
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.RxStateIdle(RxStateIdle), .Transmitting(Transmitting), .RxByteCnt(RxByteCnt),
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.RxStateIdle(RxStateIdle), .Transmitting(Transmitting), .RxByteCnt(RxByteCnt),
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.RxByteCntEq0(RxByteCntEq0), .RxByteCntGreat2(RxByteCntGreat2), .RxByteCntMaxFrame(RxByteCntMaxFrame),
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.RxByteCntEq0(RxByteCntEq0), .RxByteCntGreat2(RxByteCntGreat2), .RxByteCntMaxFrame(RxByteCntMaxFrame),
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.ReceivedPauseFrm(ReceivedPauseFrm)
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.ReceivedPauseFrm(ReceivedPauseFrm),.InvalidSymbol(InvalidSymbol),
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.MRxD(MRxD_Lb), .LatchedCrcError(LatchedCrcError), .Collision(mcoll_pad_i),
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.CollValid(r_CollValid), .RxLateCollision(RxLateCollision), .r_RecSmall(r_RecSmall),
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.r_MinFL(r_MinFL), .r_MaxFL(r_MaxFL), .ShortFrame(ShortFrame),
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.DribbleNibble(DribbleNibble), .ReceivedPacketTooBig(ReceivedPacketTooBig), .r_HugEn(r_HugEn),
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.LoadRxStatus(LoadRxStatus)
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);
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);
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endmodule
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endmodule
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No newline at end of file
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No newline at end of file
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