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[/] [ethmac/] [trunk/] [bench/] [verilog/] [tb_ethernet.v] - Diff between revs 344 and 345

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Rev 344 Rev 345
Line 511... Line 511...
  test_note("PHY generates ideal Carrier sense and Collision signals for following tests");
  test_note("PHY generates ideal Carrier sense and Collision signals for following tests");
  eth_phy.carrier_sense_real_delay(0);
  eth_phy.carrier_sense_real_delay(0);
    test_mac_full_duplex_transmit(0, 23);    // 0 - 23
    test_mac_full_duplex_transmit(0, 23);    // 0 - 23
    test_mac_full_duplex_receive(0, 15);     // 0 - 15
    test_mac_full_duplex_receive(0, 15);     // 0 - 15
    test_mac_full_duplex_flow_control(0, 5); // 0 - 5
    test_mac_full_duplex_flow_control(0, 5); // 0 - 5
    test_mac_half_duplex_flow(0, 1);
 
 
 
 
 
    // Tests not working, yet.
    // Tests not working, yet.
    // test_mac_half_duplex_flow(0, 0);  // 2, 3, 4, 5 These tests need to be fixed !!!
    // test_mac_half_duplex_flow(0, 5);  // 0, 1, 2, 3, 4, 5 These tests need to be fixed !!!
 
 
    $display("");
    $display("");
    $display("===========================================================================");
    $display("===========================================================================");
    $display("PHY generates 'real delayed' Carrier sense and Collision signals for following tests");
    $display("PHY generates 'real delayed' Carrier sense and Collision signals for following tests");
    $display("===========================================================================");
    $display("===========================================================================");
    test_note("PHY generates 'real delayed' Carrier sense and Collision signals for following tests");
    test_note("PHY generates 'real delayed' Carrier sense and Collision signals for following tests");
    eth_phy.carrier_sense_real_delay(1);
    eth_phy.carrier_sense_real_delay(1);
    test_mac_full_duplex_transmit(0, 23);    // 0 - 23
    test_mac_full_duplex_transmit(0, 23);    // 0 - 23
    test_mac_full_duplex_receive(0, 15);     // 0 - 15
    test_mac_full_duplex_receive(0, 15);     // 0 - 15
    test_mac_full_duplex_flow_control(0, 5); // 0 - 5
    test_mac_full_duplex_flow_control(0, 5); // 0 - 5
    test_mac_half_duplex_flow(0, 1);
    //test_mac_half_duplex_flow(0, 5);
 
 
 
 
  // Finish test's logs
  // Finish test's logs
  test_summary;
  test_summary;
  $display("\n\n END of SIMULATION");
  $display("\n\n END of SIMULATION");

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