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[/] [ethmac/] [trunk/] [bench/] [verilog/] [wb_model_defines.v] - Diff between revs 338 and 346

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//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
////                                                              ////
////                                                              ////
////  File name "wb_model_defines.v"                              ////
////  File name "wb_model_defines.v"                              ////
////                                                              ////
////                                                              ////
////  This file is part of the Ethernet IP core project           ////
////  This file is part of the Ethernet IP core project           ////
////  http://www.opencores.org/projects/ethmac/                   ////
////  http://www.opencores.org/project,ethmac                     ////
////                                                              ////
////                                                              ////
////  Author(s):                                                  ////
////  Author(s):                                                  ////
////      - Miha Dolenc (mihad@opencores.org)                     ////
////      - Miha Dolenc (mihad@opencores.org)                     ////
////                                                              ////
////                                                              ////
////  All additional information is available in the README.pdf   ////
////  All additional information is available in the README.pdf   ////

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