| Line 39... |
Line 39... |
//////////////////////////////////////////////////////////////////////
|
//////////////////////////////////////////////////////////////////////
|
//
|
//
|
// CVS Revision History
|
// CVS Revision History
|
//
|
//
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.4 2002/11/22 01:57:06 mohor
|
|
// Rx Flow control fixed. CF flag added to the RX buffer descriptor. RxAbort
|
|
// synchronized.
|
|
//
|
// Revision 1.3 2002/01/23 10:28:16 mohor
|
// Revision 1.3 2002/01/23 10:28:16 mohor
|
// Link in the header changed.
|
// Link in the header changed.
|
//
|
//
|
// Revision 1.2 2001/10/19 08:43:51 mohor
|
// Revision 1.2 2001/10/19 08:43:51 mohor
|
// eth_timescale.v changed to timescale.v This is done because of the
|
// eth_timescale.v changed to timescale.v This is done because of the
|
| Line 75... |
Line 79... |
|
|
module eth_receivecontrol (MTxClk, MRxClk, TxReset, RxReset, RxData, RxValid, RxStartFrm,
|
module eth_receivecontrol (MTxClk, MRxClk, TxReset, RxReset, RxData, RxValid, RxStartFrm,
|
RxEndFrm, RxFlow, ReceiveEnd, MAC, DlyCrcEn, TxDoneIn,
|
RxEndFrm, RxFlow, ReceiveEnd, MAC, DlyCrcEn, TxDoneIn,
|
TxAbortIn, TxStartFrmOut, ReceivedLengthOK, ReceivedPacketGood,
|
TxAbortIn, TxStartFrmOut, ReceivedLengthOK, ReceivedPacketGood,
|
TxUsedDataOutDetected, Pause, ReceivedPauseFrm, AddressOK,
|
TxUsedDataOutDetected, Pause, ReceivedPauseFrm, AddressOK,
|
LoadRxStatus, SetPauseTimer
|
RxStatusWriteLatched_sync2, r_PassAll, SetPauseTimer
|
);
|
);
|
|
|
parameter Tp = 1;
|
parameter Tp = 1;
|
|
|
|
|
| Line 99... |
Line 103... |
input TxAbortIn;
|
input TxAbortIn;
|
input TxStartFrmOut;
|
input TxStartFrmOut;
|
input ReceivedLengthOK;
|
input ReceivedLengthOK;
|
input ReceivedPacketGood;
|
input ReceivedPacketGood;
|
input TxUsedDataOutDetected;
|
input TxUsedDataOutDetected;
|
input LoadRxStatus;
|
input RxStatusWriteLatched_sync2;
|
|
input r_PassAll;
|
|
|
output Pause;
|
output Pause;
|
output ReceivedPauseFrm;
|
output ReceivedPauseFrm;
|
output AddressOK;
|
output AddressOK;
|
output SetPauseTimer;
|
output SetPauseTimer;
|
|
|
|
|
reg Pause;
|
reg Pause;
|
reg AddressOK; // Multicast or unicast address detected
|
reg AddressOK; // Multicast or unicast address detected
|
reg TypeLengthOK; // Type/Length field contains 0x8808
|
reg TypeLengthOK; // Type/Length field contains 0x8808
|
reg DetectionWindow; // Detection of the PAUSE frame is possible within this window
|
reg DetectionWindow; // Detection of the PAUSE frame is possible within this window
|
reg OpCodeOK; // PAUSE opcode detected (0x0001)
|
reg OpCodeOK; // PAUSE opcode detected (0x0001)
|
| Line 207... |
Line 213... |
always @ (posedge MRxClk or posedge RxReset )
|
always @ (posedge MRxClk or posedge RxReset )
|
begin
|
begin
|
if(RxReset)
|
if(RxReset)
|
OpCodeOK <= #Tp 1'b0;
|
OpCodeOK <= #Tp 1'b0;
|
else
|
else
|
if(RxStartFrm)
|
if(ByteCntEq16)
|
OpCodeOK <= #Tp 1'b0;
|
OpCodeOK <= #Tp 1'b0;
|
else
|
else
|
begin
|
begin
|
if(DetectionWindow & ByteCntEq14)
|
if(DetectionWindow & ByteCntEq14)
|
OpCodeOK <= #Tp ByteCntEq14 & RxData[7:0] == 8'h00;
|
OpCodeOK <= #Tp ByteCntEq14 & RxData[7:0] == 8'h00;
|
| Line 419... |
Line 425... |
always @ (posedge MRxClk or posedge RxReset)
|
always @ (posedge MRxClk or posedge RxReset)
|
begin
|
begin
|
if(RxReset)
|
if(RxReset)
|
ReceivedPauseFrm <=#Tp 1'b0;
|
ReceivedPauseFrm <=#Tp 1'b0;
|
else
|
else
|
|
if(RxStatusWriteLatched_sync2 & r_PassAll | ReceivedPauseFrm & (~r_PassAll))
|
|
ReceivedPauseFrm <=#Tp 1'b0;
|
|
else
|
if(ByteCntEq16 & TypeLengthOK & OpCodeOK)
|
if(ByteCntEq16 & TypeLengthOK & OpCodeOK)
|
ReceivedPauseFrm <=#Tp 1'b1;
|
ReceivedPauseFrm <=#Tp 1'b1;
|
else
|
|
if(RxStartFrm)
|
|
ReceivedPauseFrm <=#Tp 1'b0;
|
|
end
|
end
|
|
|
|
|
endmodule
|
endmodule
|
|
|
No newline at end of file
|
No newline at end of file
|
