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[/] [ethmac/] [trunk/] [rtl/] [verilog/] [eth_register.v] - Diff between revs 74 and 136

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////  All additional information is avaliable in the Readme.txt   ////
////  All additional information is avaliable in the Readme.txt   ////
////  file.                                                       ////
////  file.                                                       ////
////                                                              ////
////                                                              ////
//////////////////////////////////////////////////////////////////////
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////                                                              ////
////                                                              ////
//// Copyright (C) 2001 Authors                                   ////
//// Copyright (C) 2001, 2002 Authors                             ////
////                                                              ////
////                                                              ////
//// This source file may be used and distributed without         ////
//// This source file may be used and distributed without         ////
//// restriction provided that this copyright statement is not    ////
//// restriction provided that this copyright statement is not    ////
//// removed from the file and that any derivative work contains  ////
//// removed from the file and that any derivative work contains  ////
//// the original copyright notice and the associated disclaimer. ////
//// the original copyright notice and the associated disclaimer. ////
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//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.4  2002/02/26 16:18:08  mohor
 
// Reset values are passed to registers through parameters
 
//
// Revision 1.3  2002/01/23 10:28:16  mohor
// Revision 1.3  2002/01/23 10:28:16  mohor
// Link in the header changed.
// Link in the header changed.
//
//
// Revision 1.2  2001/10/19 08:43:51  mohor
// Revision 1.2  2001/10/19 08:43:51  mohor
// eth_timescale.v changed to timescale.v This is done because of the
// eth_timescale.v changed to timescale.v This is done because of the
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module eth_register(DataIn, DataOut, Write, Clk, Reset);
module eth_register(DataIn, DataOut, Write, Clk, Reset);
 
 
parameter WIDTH = 8; // default parameter of the register width
parameter WIDTH = 8; // default parameter of the register width
parameter ResetValue = 0;
parameter RESET_VALUE = 0;
 
 
input [WIDTH-1:0] DataIn;
input [WIDTH-1:0] DataIn;
 
 
input Write;
input Write;
input Clk;
input Clk;
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always @ (posedge Clk or posedge Reset)
always @ (posedge Clk or posedge Reset)
begin
begin
  if(Reset)
  if(Reset)
    DataOut<=#1 ResetValue;
    DataOut<=#1 RESET_VALUE;
  else
  else
  if(Write)                         // write
  if(Write)                         // write
    DataOut<=#1 DataIn;
    DataOut<=#1 DataIn;
end
end
 
 

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