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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// eth_rxethmac.v ////
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//// eth_rxethmac.v ////
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//// ////
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//// ////
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//// This file is part of the Ethernet IP core project ////
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//// This file is part of the Ethernet IP core project ////
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//// http://www.opencores.org/projects/ethmac/ ////
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//// http://www.opencores.org/projects,ethmac/ ////
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//// ////
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//// ////
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//// Author(s): ////
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//// Author(s): ////
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//// - Igor Mohor (igorM@opencores.org) ////
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//// - Igor Mohor (igorM@opencores.org) ////
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//// - Novan Hartadi (novan@vlsi.itb.ac.id) ////
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//// - Novan Hartadi (novan@vlsi.itb.ac.id) ////
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//// - Mahmud Galela (mgalela@vlsi.itb.ac.id) ////
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//// - Mahmud Galela (mgalela@vlsi.itb.ac.id) ////
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//// - Olof Kindgren (olof@opencores.org ////
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//// ////
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//// ////
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//// All additional information is avaliable in the Readme.txt ////
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//// All additional information is avaliable in the Readme.txt ////
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//// file. ////
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//// file. ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2001 Authors ////
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//// Copyright (C) 2011 Authors ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// the original copyright notice and the associated disclaimer. ////
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//// Public License along with this source; if not, download it ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// 2011-07-06 Olof Kindgren <olof@opencores.org>
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// Add ByteCntEq0 to rxaddrcheck
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.12 2004/04/26 15:26:23 igorm
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// Revision 1.12 2004/04/26 15:26:23 igorm
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// - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
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// - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
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// previous update of the core.
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// previous update of the core.
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// - TxBDAddress is set to 0 after the TX is enabled in the MODER register.
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// - TxBDAddress is set to 0 after the TX is enabled in the MODER register.
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eth_rxaddrcheck rxaddrcheck1
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eth_rxaddrcheck rxaddrcheck1
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(.MRxClk(MRxClk), .Reset( Reset), .RxData(RxData),
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(.MRxClk(MRxClk), .Reset( Reset), .RxData(RxData),
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.Broadcast (Broadcast), .r_Bro (r_Bro), .r_Pro(r_Pro),
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.Broadcast (Broadcast), .r_Bro (r_Bro), .r_Pro(r_Pro),
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.ByteCntEq6(ByteCntEq6), .ByteCntEq7(ByteCntEq7), .ByteCntEq2(ByteCntEq2),
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.ByteCntEq6(ByteCntEq6), .ByteCntEq7(ByteCntEq7), .ByteCntEq2(ByteCntEq2),
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.ByteCntEq3(ByteCntEq3), .ByteCntEq4(ByteCntEq4), .ByteCntEq5(ByteCntEq5),
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.ByteCntEq3(ByteCntEq3), .ByteCntEq4(ByteCntEq4), .ByteCntEq5(ByteCntEq5),
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.HASH0(r_HASH0), .HASH1(r_HASH1),
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.HASH0(r_HASH0), .HASH1(r_HASH1), .ByteCntEq0(ByteCntEq0),
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.CrcHash(CrcHash), .CrcHashGood(CrcHashGood), .StateData(StateData),
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.CrcHash(CrcHash), .CrcHashGood(CrcHashGood), .StateData(StateData),
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.Multicast(Multicast), .MAC(MAC), .RxAbort(RxAbort),
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.Multicast(Multicast), .MAC(MAC), .RxAbort(RxAbort),
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.RxEndFrm(RxEndFrm), .AddressMiss(AddressMiss), .PassAll(PassAll),
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.RxEndFrm(RxEndFrm), .AddressMiss(AddressMiss), .PassAll(PassAll),
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.ControlFrmAddressOK(ControlFrmAddressOK)
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.ControlFrmAddressOK(ControlFrmAddressOK)
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);
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);
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