Subversion Repositories ethmac

  // WISHBONE master

  // WISHBONE master

  m_wb_adr_o, m_wb_sel_o, m_wb_we_o,

  m_wb_adr_o, m_wb_sel_o, m_wb_we_o,

  m_wb_dat_o, m_wb_dat_i, m_wb_cyc_o,

  m_wb_dat_o, m_wb_dat_i, m_wb_cyc_o,

  m_wb_stb_o, m_wb_ack_i, m_wb_err_i,

  m_wb_stb_o, m_wb_ack_i, m_wb_err_i,

  m_wb_cti_o, m_wb_bte_o,

  m_wb_cti_o, m_wb_bte_o,

  //TX

  //TX

  mtx_clk_pad_i, mtxd_pad_o, mtxen_pad_o, mtxerr_pad_o,

  mtx_clk_pad_i, mtxd_pad_o, mtxen_pad_o, mtxerr_pad_o,

  //RX

  //RX

input           m_wb_ack_i;

input           m_wb_ack_i;

input           m_wb_err_i;

input           m_wb_err_i;

wire    [29:0]  m_wb_adr_tmp;

wire    [29:0]  m_wb_adr_tmp;

output   [2:0]  m_wb_cti_o;   // Cycle Type Identifier

output   [2:0]  m_wb_cti_o;   // Cycle Type Identifier

output   [1:0]  m_wb_bte_o;   // Burst Type Extension

output   [1:0]  m_wb_bte_o;   // Burst Type Extension

// Tx

// Tx

input           mtx_clk_pad_i; // Transmit clock (from PHY)

input           mtx_clk_pad_i; // Transmit clock (from PHY)

output   [3:0]  mtxd_pad_o;    // Transmit nibble (to PHY)

output   [3:0]  mtxd_pad_o;    // Transmit nibble (to PHY)

output          mtxen_pad_o;   // Transmit enable (to PHY)

output          mtxen_pad_o;   // Transmit enable (to PHY)

  .m_wb_cyc_o(m_wb_cyc_o),

  .m_wb_cyc_o(m_wb_cyc_o),

  .m_wb_stb_o(m_wb_stb_o),

  .m_wb_stb_o(m_wb_stb_o),

  .m_wb_ack_i(m_wb_ack_i),

  .m_wb_ack_i(m_wb_ack_i),

  .m_wb_err_i(m_wb_err_i),

  .m_wb_err_i(m_wb_err_i),

  .m_wb_cti_o(m_wb_cti_o),

  .m_wb_cti_o(m_wb_cti_o),

  .m_wb_bte_o(m_wb_bte_o),

  .m_wb_bte_o(m_wb_bte_o),

    //TX

    //TX

  .MTxClk(mtx_clk_pad_i),

  .MTxClk(mtx_clk_pad_i),

  .TxStartFrm(TxStartFrm),

  .TxStartFrm(TxStartFrm),

  .TxEndFrm(TxEndFrm),

  .TxEndFrm(TxEndFrm),