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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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// CVS Log
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//
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//
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// $Id: i2c_master_bit_ctrl.v,v 1.8 2003-02-05 00:06:10 rherveille Exp $
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// $Id: i2c_master_bit_ctrl.v,v 1.9 2003-03-10 14:26:37 rherveille Exp $
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//
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//
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// $Date: 2003-02-05 00:06:10 $
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// $Date: 2003-03-10 14:26:37 $
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// $Revision: 1.8 $
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// $Revision: 1.9 $
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// $Author: rherveille $
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// $Author: rherveille $
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// $Locker: $
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// $Locker: $
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// $State: Exp $
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// $State: Exp $
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//
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//
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// Change History:
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// Change History:
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.8 2003/02/05 00:06:10 rherveille
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// Fixed a bug where the core would trigger an erroneous 'arbitration lost' interrupt after being reset, when the reset pulse width < 3 clk cycles.
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//
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// Revision 1.7 2002/12/26 16:05:12 rherveille
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// Revision 1.7 2002/12/26 16:05:12 rherveille
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// Small code simplifications
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// Small code simplifications
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//
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//
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// Revision 1.6 2002/12/26 15:02:32 rherveille
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// Revision 1.6 2002/12/26 15:02:32 rherveille
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// Core is now a Multimaster I2C controller
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// Core is now a Multimaster I2C controller
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end
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end
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stop_d:
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stop_d:
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begin
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begin
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c_state <= #1 idle;
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c_state <= #1 idle;
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cmd_ack <= #1 clk_en;
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cmd_ack <= #1 1'b1;
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scl_oen <= #1 1'b1; // keep SCL high
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scl_oen <= #1 1'b1; // keep SCL high
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sda_oen <= #1 1'b1; // set SDA high
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sda_oen <= #1 1'b1; // set SDA high
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sda_chk <= #1 1'b0; // don't check SDA output
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sda_chk <= #1 1'b0; // don't check SDA output
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end
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end
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end
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end
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rd_d:
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rd_d:
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begin
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begin
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c_state <= #1 idle;
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c_state <= #1 idle;
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cmd_ack <= #1 clk_en;
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cmd_ack <= #1 1'b1;
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scl_oen <= #1 1'b0; // set SCL low
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scl_oen <= #1 1'b0; // set SCL low
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sda_oen <= #1 1'b1; // keep SDA tri-stated
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sda_oen <= #1 1'b1; // keep SDA tri-stated
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sda_chk <= #1 1'b0; // don't check SDA output
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sda_chk <= #1 1'b0; // don't check SDA output
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end
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end
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