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---- ----
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---- ----
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---------------------------------------------------------------------
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---------------------------------------------------------------------
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-- CVS Log
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-- CVS Log
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--
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--
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-- $Id: i2c_master_bit_ctrl.vhd,v 1.6 2003-02-01 02:03:06 rherveille Exp $
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-- $Id: i2c_master_bit_ctrl.vhd,v 1.7 2003-02-05 00:06:02 rherveille Exp $
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--
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--
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-- $Date: 2003-02-01 02:03:06 $
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-- $Date: 2003-02-05 00:06:02 $
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-- $Revision: 1.6 $
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-- $Revision: 1.7 $
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-- $Author: rherveille $
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-- $Author: rherveille $
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-- $Locker: $
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-- $Locker: $
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-- $State: Exp $
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-- $State: Exp $
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--
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--
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-- Change History:
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-- Change History:
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-- $Log: not supported by cvs2svn $
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-- $Log: not supported by cvs2svn $
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-- Revision 1.6 2003/02/01 02:03:06 rherveille
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-- Fixed a few 'arbitration lost' bugs. VHDL version only.
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--
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-- Revision 1.5 2002/12/26 16:05:47 rherveille
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-- Revision 1.5 2002/12/26 16:05:47 rherveille
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-- Core is now a Multimaster I2C controller.
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-- Core is now a Multimaster I2C controller.
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--
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--
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-- Revision 1.4 2002/11/30 22:24:37 rherveille
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-- Revision 1.4 2002/11/30 22:24:37 rherveille
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-- Cleaned up code
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-- Cleaned up code
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Line 207... |
signal sto_condition : std_logic; -- stop detected
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signal sto_condition : std_logic; -- stop detected
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signal cmd_stop, dcmd_stop : std_logic; -- STOP command
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signal cmd_stop, dcmd_stop : std_logic; -- STOP command
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signal ibusy : std_logic; -- internal busy signal
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signal ibusy : std_logic; -- internal busy signal
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begin
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begin
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-- synchronize SCL and SDA inputs
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-- synchronize SCL and SDA inputs
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synch_scl_sda: process(clk)
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synch_scl_sda: process(clk, nReset)
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begin
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begin
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if (clk'event and clk = '1') then
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if (nReset = '0') then
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sSCL <= '1';
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sSDA <= '1';
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dSCL <= '1';
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dSDA <= '1';
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elsif (clk'event and clk = '1') then
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if (rst = '1') then
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sSCL <= '1';
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sSDA <= '1';
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dSCL <= '1';
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dSDA <= '1';
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else
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sSCL <= scl_i;
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sSCL <= scl_i;
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sSDA <= sda_i;
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sSDA <= sda_i;
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dSCL <= sSCL;
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dSCL <= sSCL;
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dSDA <= sSDA;
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dSDA <= sSDA;
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end if;
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end if;
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end if;
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end process synch_SCL_SDA;
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end process synch_SCL_SDA;
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-- detect start condition => detect falling edge on SDA while SCL is high
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-- detect start condition => detect falling edge on SDA while SCL is high
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-- detect stop condition => detect rising edge on SDA while SCL is high
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-- detect stop condition => detect rising edge on SDA while SCL is high
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detect_sta_sto: process(clk)
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detect_sta_sto: process(clk, nReset)
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begin
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begin
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if (clk'event and clk = '1') then
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if (nReset = '0') then
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sta_condition <= '0';
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sto_condition <= '0';
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elsif (clk'event and clk = '1') then
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if (rst = '1') then
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sta_condition <= '0';
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sto_condition <= '0';
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else
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sta_condition <= (not sSDA and dSDA) and sSCL;
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sta_condition <= (not sSDA and dSDA) and sSCL;
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sto_condition <= (sSDA and not dSDA) and sSCL;
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sto_condition <= (sSDA and not dSDA) and sSCL;
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end if;
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end if;
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end if;
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end process detect_sta_sto;
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end process detect_sta_sto;
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-- generate i2c-bus busy signal
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-- generate i2c-bus busy signal
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gen_busy: process(clk, nReset)
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gen_busy: process(clk, nReset)
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begin
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begin
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| Line 242... |
Line 267... |
end process gen_busy;
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end process gen_busy;
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busy <= ibusy;
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busy <= ibusy;
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-- generate arbitration lost signal
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-- generate arbitration lost signal
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gen_al: process(clk)
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gen_al: process(clk, nReset)
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begin
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begin
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if (clk'event and clk = '1') then
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if (nReset = '0') then
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cmd_stop <= '0';
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dcmd_stop <= '0';
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ial <= '0';
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elsif (clk'event and clk = '1') then
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if (rst = '1') then
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cmd_stop <= '0';
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dcmd_stop <= '0';
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ial <= '0';
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else
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if (cmd = I2C_CMD_STOP) then
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if (cmd = I2C_CMD_STOP) then
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cmd_stop <= '1';
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cmd_stop <= '1';
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else
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else
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cmd_stop <= '0';
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cmd_stop <= '0';
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end if;
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end if;
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dcmd_stop <= cmd_stop;
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dcmd_stop <= cmd_stop;
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al <= (sda_chk and not sSDA and isda_oen) or (sto_condition and not dcmd_stop);
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ial <= (sda_chk and not sSDA and isda_oen) or (sto_condition and not dcmd_stop);
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end if;
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end if;
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end if;
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end process gen_al;
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end process gen_al;
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ial <= al;
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al <= ial;
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-- generate dout signal, store dout on rising edge of SCL
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-- generate dout signal, store dout on rising edge of SCL
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gen_dout: process(clk)
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gen_dout: process(clk)
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begin
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begin
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if (clk'event and clk = '1') then
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if (clk'event and clk = '1') then
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