--
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--
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--
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--
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-- State machine for reading data from Dallas 1621
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-- State machine for reading data from Dallas 1621
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--
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--
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-- Testsystem for i2c controller
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-- Testsystem for i2c controller
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--
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--
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--
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--
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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use work.i2c.all;
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use work.i2c.all;
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entity DS1621_interface is
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entity DS1621_interface is
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port (
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port (
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clk : in std_logic;
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clk : in std_logic;
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nReset : in std_logic;
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nReset : in std_logic;
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Dout : out std_logic_vector(7 downto 0); -- data read from ds1621
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Dout : out std_logic_vector(7 downto 0); -- data read from ds1621
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error : out std_logic; -- no correct ack received
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error : out std_logic; -- no correct ack received
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SCL : inout std_logic;
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SCL : inout std_logic;
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SDA : inout std_logic
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SDA : inout std_logic
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);
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);
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end entity DS1621_interface;
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end entity DS1621_interface;
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architecture structural of DS1621_interface is
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architecture structural of DS1621_interface is
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constant SLAVE_ADDR : std_logic_vector(6 downto 0) := "1001000";
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constant SLAVE_ADDR : std_logic_vector(6 downto 0) := "1001000";
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constant CLK_CNT : unsigned(7 downto 0) := conv_unsigned(20, 8);
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constant CLK_CNT : unsigned(7 downto 0) := conv_unsigned(20, 8);
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signal cmd_ack : std_logic;
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signal cmd_ack : std_logic;
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signal D : std_logic_vector(7 downto 0);
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signal D : std_logic_vector(7 downto 0);
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signal lack, store_dout : std_logic;
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signal lack, store_dout : std_logic;
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signal start, read, write, ack, stop : std_logic;
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signal start, read, write, ack, stop : std_logic;
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signal i2c_dout : std_logic_vector(7 downto 0);
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signal i2c_dout : std_logic_vector(7 downto 0);
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begin
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begin
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-- hookup I2C controller
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-- hookup I2C controller
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u1: simple_i2c port map (clk => clk, ena => '1', clk_cnt => clk_cnt, nReset => nReset,
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u1: simple_i2c port map (clk => clk, ena => '1', clk_cnt => clk_cnt, nReset => nReset,
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read => read, write => write, start => start, stop => stop, ack_in => ack, cmd_ack => cmd_ack,
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read => read, write => write, start => start, stop => stop, ack_in => ack, cmd_ack => cmd_ack,
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Din => D, Dout => i2c_dout, ack_out => lack, SCL => SCL, SDA => SDA);
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Din => D, Dout => i2c_dout, ack_out => lack, SCL => SCL, SDA => SDA);
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init_statemachine : block
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init_statemachine : block
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type states is (i1, i2, i3, i4, i5, t1, t2, t3, t4, t5);
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type states is (i1, i2, i3, i4, i5, t1, t2, t3, t4, t5);
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signal state : states;
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signal state : states;
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begin
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begin
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nxt_state_decoder: process(clk, nReset, state)
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nxt_state_decoder: process(clk, nReset, state)
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variable nxt_state : states;
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variable nxt_state : states;
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variable iD : std_logic_vector(7 downto 0);
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variable iD : std_logic_vector(7 downto 0);
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variable ierr : std_logic;
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variable ierr : std_logic;
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variable istart, iread, iwrite, iack, istop : std_logic;
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variable istart, iread, iwrite, iack, istop : std_logic;
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variable istore_dout : std_logic;
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variable istore_dout : std_logic;
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begin
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begin
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nxt_state := state;
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nxt_state := state;
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ierr := '0';
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ierr := '0';
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istore_dout := '0';
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istore_dout := '0';
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istart := start;
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istart := start;
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iread := read;
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iread := read;
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iwrite := write;
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iwrite := write;
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iack := ack;
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iack := ack;
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istop := stop;
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istop := stop;
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iD := D;
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iD := D;
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case (state) is
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case (state) is
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-- init DS1621
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-- init DS1621
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-- 1) send start condition
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-- 1) send start condition
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-- 2) send slave address + write
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-- 2) send slave address + write
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-- 3) check ack
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-- 3) check ack
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-- 4) send "access config" command (0xAC)
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-- 4) send "access config" command (0xAC)
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-- 5) check ack
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-- 5) check ack
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-- 6) send config register data (0x00)
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-- 6) send config register data (0x00)
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-- 7) check ack
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-- 7) check ack
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-- 8) send stop condition
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-- 8) send stop condition
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-- 9) send start condition
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-- 9) send start condition
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-- 10) send slave address + write
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-- 10) send slave address + write
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-- 11) check ack
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-- 11) check ack
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-- 12) send "start conversion" command (0xEE)
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-- 12) send "start conversion" command (0xEE)
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-- 13) check ack
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-- 13) check ack
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-- 14) send stop condition
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-- 14) send stop condition
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when i1 => -- send start condition, sent slave address + write
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when i1 => -- send start condition, sent slave address + write
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nxt_state := i2;
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nxt_state := i2;
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istart := '1';
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istart := '1';
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iread := '0';
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iread := '0';
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iwrite := '1';
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iwrite := '1';
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iack := '0';
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iack := '0';
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istop := '0';
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istop := '0';
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iD := (slave_addr & '0'); -- write to slave (R/W = '0')
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iD := (slave_addr & '0'); -- write to slave (R/W = '0')
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when i2 => -- send "access config" command
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when i2 => -- send "access config" command
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if (cmd_ack = '1') then
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if (cmd_ack = '1') then
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nxt_state := i3;
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nxt_state := i3;
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-- check aknowledge bit
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-- check aknowledge bit
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if (lack = '1') then
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if (lack = '1') then
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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end if;
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end if;
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istart := '0';
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istart := '0';
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iread := '0';
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iread := '0';
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iwrite := '1';
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iwrite := '1';
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iack := '0';
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iack := '0';
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istop := '0';
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istop := '0';
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iD := x"AC";
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iD := x"AC";
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end if;
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end if;
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when i3 => -- send config register data, sent stop condition
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when i3 => -- send config register data, sent stop condition
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if (cmd_ack = '1') then
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if (cmd_ack = '1') then
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nxt_state := i4;
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nxt_state := i4;
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-- check aknowledge bit
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-- check aknowledge bit
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if (lack = '1') then
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if (lack = '1') then
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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end if;
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end if;
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istart := '0';
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istart := '0';
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iread := '0';
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iread := '0';
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iwrite := '1';
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iwrite := '1';
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iack := '0';
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iack := '0';
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istop := '1';
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istop := '1';
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iD := x"00";
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iD := x"00";
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end if;
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end if;
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when i4 => -- send start condition, sent slave address + write
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when i4 => -- send start condition, sent slave address + write
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if (cmd_ack = '1') then
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if (cmd_ack = '1') then
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nxt_state := i5;
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nxt_state := i5;
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istart := '1';
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istart := '1';
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iread := '0';
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iread := '0';
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iwrite := '1';
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iwrite := '1';
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iack := '0';
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iack := '0';
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istop := '0';
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istop := '0';
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iD := (slave_addr & '0'); -- write to slave (R/W = '0')
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iD := (slave_addr & '0'); -- write to slave (R/W = '0')
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end if;
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end if;
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when i5 => -- send "start conversion" command + stop condition
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when i5 => -- send "start conversion" command + stop condition
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if (cmd_ack = '1') then
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if (cmd_ack = '1') then
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nxt_state := t1;
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nxt_state := t1;
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-- check aknowledge bit
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-- check aknowledge bit
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if (lack = '1') then
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if (lack = '1') then
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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end if;
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end if;
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istart := '0';
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istart := '0';
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iread := '0';
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iread := '0';
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iwrite := '1';
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iwrite := '1';
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iack := '0';
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iack := '0';
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istop := '1';
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istop := '1';
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iD := x"EE";
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iD := x"EE";
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end if;
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end if;
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-- read temperature
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-- read temperature
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-- 1) sent start condition
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-- 1) sent start condition
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-- 2) sent slave address + write
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-- 2) sent slave address + write
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-- 3) check ack
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-- 3) check ack
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-- 4) sent "read temperature" command (0xAA)
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-- 4) sent "read temperature" command (0xAA)
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-- 5) check ack
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-- 5) check ack
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-- 6) sent start condition
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-- 6) sent start condition
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-- 7) sent slave address + read
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-- 7) sent slave address + read
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-- 8) check ack
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-- 8) check ack
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-- 9) read msb
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-- 9) read msb
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-- 10) send ack
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-- 10) send ack
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-- 11) read lsb
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-- 11) read lsb
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-- 12) send nack
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-- 12) send nack
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-- 13) send stop condition
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-- 13) send stop condition
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when t1 => -- send start condition, sent slave address + write
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when t1 => -- send start condition, sent slave address + write
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if (cmd_ack = '1') then
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if (cmd_ack = '1') then
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nxt_state := t2;
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nxt_state := t2;
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-- check aknowledge bit
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-- check aknowledge bit
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if (lack = '1') then
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if (lack = '1') then
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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end if;
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end if;
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istart := '1';
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istart := '1';
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iread := '0';
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iread := '0';
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iwrite := '1';
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iwrite := '1';
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iack := '0';
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iack := '0';
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istop := '0';
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istop := '0';
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iD := (slave_addr & '0'); -- write to slave (R/W = '0')
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iD := (slave_addr & '0'); -- write to slave (R/W = '0')
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end if;
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end if;
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when t2 => -- send read temperature command
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when t2 => -- send read temperature command
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if (cmd_ack = '1') then
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if (cmd_ack = '1') then
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nxt_state := t3;
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nxt_state := t3;
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-- check aknowledge bit
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-- check aknowledge bit
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if (lack = '1') then
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if (lack = '1') then
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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end if;
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end if;
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istart := '0';
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istart := '0';
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iread := '0';
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iread := '0';
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iwrite := '1';
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iwrite := '1';
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iack := '0';
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iack := '0';
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istop := '0';
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istop := '0';
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iD := x"AA";
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iD := x"AA";
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end if;
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end if;
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when t3 => -- send (repeated) start condition, send slave address + read
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when t3 => -- send (repeated) start condition, send slave address + read
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if (cmd_ack = '1') then
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if (cmd_ack = '1') then
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nxt_state := t4;
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nxt_state := t4;
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-- check aknowledge bit
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-- check aknowledge bit
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if (lack = '1') then
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if (lack = '1') then
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ierr := '1'; -- no acknowledge received, expected ACK
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ierr := '1'; -- no acknowledge received, expected ACK
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end if;
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end if;
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istart := '1';
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istart := '1';
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iread := '0';
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iread := '0';
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iwrite := '1';
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iwrite := '1';
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iack := '0';
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iack := '0';
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istop := '0';
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istop := '0';
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iD := (slave_addr & '1'); -- read from slave (R/W = '1')
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iD := (slave_addr & '1'); -- read from slave (R/W = '1')
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end if;
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end if;
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when t4 => -- read MSB (hi-byte), send acknowledge
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when t4 => -- read MSB (hi-byte), send acknowledge
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if (cmd_ack = '1') then
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if (cmd_ack = '1') then
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nxt_state := t5;
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nxt_state := t5;
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-- check aknowledge bit
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-- check aknowledge bit
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if (lack = '1') then
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if (lack = '1') then
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ierr := '1'; -- no acknowledge received from last command, expected ACK
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ierr := '1'; -- no acknowledge received from last command, expected ACK
|
end if;
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end if;
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istart := '0';
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istart := '0';
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iread := '1';
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iread := '1';
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iwrite := '0';
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iwrite := '0';
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iack := '0'; --ACK
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iack := '0'; --ACK
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istop := '0';
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istop := '0';
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end if;
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end if;
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when t5 => -- read LSB (lo-byte), send acknowledge, sent stop
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when t5 => -- read LSB (lo-byte), send acknowledge, sent stop
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if (cmd_ack = '1') then
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if (cmd_ack = '1') then
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nxt_state := t1;
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nxt_state := t1;
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istart := '0';
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istart := '0';
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iread := '1';
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iread := '1';
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iwrite := '0';
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iwrite := '0';
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iack := '1'; --NACK
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iack := '1'; --NACK
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istop := '1';
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istop := '1';
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|
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istore_dout := '1';
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istore_dout := '1';
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end if;
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end if;
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end case;
|
end case;
|
|
|
-- genregs
|
-- genregs
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if (nReset = '0') then
|
if (nReset = '0') then
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state <= i1;
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state <= i1;
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error <= '0';
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error <= '0';
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store_dout <= '0';
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store_dout <= '0';
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start <= '0';
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start <= '0';
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read <= '0';
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read <= '0';
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write <= '0';
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write <= '0';
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ack <= '0';
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ack <= '0';
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stop <= '0';
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stop <= '0';
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D <= (others => '0');
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D <= (others => '0');
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elsif (clk'event and clk = '1') then
|
elsif (clk'event and clk = '1') then
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state <= nxt_state;
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state <= nxt_state;
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error <= ierr;
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error <= ierr;
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store_dout <= istore_dout;
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store_dout <= istore_dout;
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|
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start <= istart;
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start <= istart;
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read <= iread;
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read <= iread;
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write <= iwrite;
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write <= iwrite;
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ack <= iack;
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ack <= iack;
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stop <= istop;
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stop <= istop;
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D <= iD;
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D <= iD;
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end if;
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end if;
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end process nxt_state_decoder;
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end process nxt_state_decoder;
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end block init_statemachine;
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end block init_statemachine;
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|
|
-- store temp
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-- store temp
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gen_dout : process(clk)
|
gen_dout : process(clk)
|
begin
|
begin
|
if (clk'event and clk = '1') then
|
if (clk'event and clk = '1') then
|
if (store_dout = '1') then
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if (store_dout = '1') then
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Dout <= i2c_dout;
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Dout <= i2c_dout;
|
end if;
|
end if;
|
end if;
|
end if;
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end process gen_dout;
|
end process gen_dout;
|
|
|
end architecture structural;
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end architecture structural;
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