OpenCores
URL https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk

Subversion Repositories iso7816_3_master

[/] [iso7816_3_master/] [trunk/] [sources/] [HalfDuplexUartIf.v] - Diff between revs 18 and 19

Show entire file | Details | Blame | View Log

Rev 18 Rev 19
Line 1... Line 1...
/*
/*
Author: Sebastien Riou (acapola)
Author: Sebastien Riou (acapola)
Creation date: 19:57:35 10/31/2010
Creation date: 19:57:35 10/31/2010
 
 
$LastChangedDate: 2011-03-07 14:17:52 +0100 (Mon, 07 Mar 2011) $
$LastChangedDate: 2011-04-17 23:31:29 +0200 (Sun, 17 Apr 2011) $
$LastChangedBy: acapola $
$LastChangedBy: acapola $
$LastChangedRevision: 18 $
$LastChangedRevision: 19 $
$HeadURL: file:///svn/iso7816_3_master/iso7816_3_master/trunk/sources/HalfDuplexUartIf.v $
$HeadURL: file:///svn/iso7816_3_master/iso7816_3_master/trunk/sources/HalfDuplexUartIf.v $
 
 
This file is under the BSD licence:
This file is under the BSD licence:
Copyright (c) 2011, Sebastien Riou
Copyright (c) 2011, Sebastien Riou
 
 
Line 89... Line 89...
assign ackFlags=~txPending & ~txRun & rxFlagsSet & ((bufferFull & ~nCsDataOut)| ~bufferFull);
assign ackFlags=~txPending & ~txRun & rxFlagsSet & ((bufferFull & ~nCsDataOut)| ~bufferFull);
 
 
always @(posedge clk, negedge nReset) begin
always @(posedge clk, negedge nReset) begin
   if(~nReset) begin
   if(~nReset) begin
      bufferFull <= 1'b0;
      bufferFull <= 1'b0;
      flagsReg <= 1'b0;
      flagsReg <= 2'b00;
      txPending <= 1'b0;
      txPending <= 1'b0;
   end else begin
   end else begin
      if(ackFlags) begin
      if(ackFlags) begin
         dataReg <= rxData;
         dataReg <= rxData;
         flagsReg <= {overrunErrorFlag, frameErrorFlag};
         flagsReg <= {overrunErrorFlag, frameErrorFlag};

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.