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https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk
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/*
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/*
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Author: Sebastien Riou (acapola)
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Author: Sebastien Riou (acapola)
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Creation date: 19:57:35 10/31/2010
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Creation date: 19:57:35 10/31/2010
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$LastChangedDate: 2011-03-07 14:17:52 +0100 (Mon, 07 Mar 2011) $
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$LastChangedDate: 2011-04-17 23:31:29 +0200 (Sun, 17 Apr 2011) $
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$LastChangedBy: acapola $
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$LastChangedBy: acapola $
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$LastChangedRevision: 18 $
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$LastChangedRevision: 19 $
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$HeadURL: file:///svn/iso7816_3_master/iso7816_3_master/trunk/sources/HalfDuplexUartIf.v $
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$HeadURL: file:///svn/iso7816_3_master/iso7816_3_master/trunk/sources/HalfDuplexUartIf.v $
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This file is under the BSD licence:
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This file is under the BSD licence:
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Copyright (c) 2011, Sebastien Riou
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Copyright (c) 2011, Sebastien Riou
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assign ackFlags=~txPending & ~txRun & rxFlagsSet & ((bufferFull & ~nCsDataOut)| ~bufferFull);
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assign ackFlags=~txPending & ~txRun & rxFlagsSet & ((bufferFull & ~nCsDataOut)| ~bufferFull);
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always @(posedge clk, negedge nReset) begin
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always @(posedge clk, negedge nReset) begin
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if(~nReset) begin
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if(~nReset) begin
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bufferFull <= 1'b0;
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bufferFull <= 1'b0;
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flagsReg <= 1'b0;
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flagsReg <= 2'b00;
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txPending <= 1'b0;
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txPending <= 1'b0;
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end else begin
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end else begin
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if(ackFlags) begin
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if(ackFlags) begin
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dataReg <= rxData;
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dataReg <= rxData;
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flagsReg <= {overrunErrorFlag, frameErrorFlag};
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flagsReg <= {overrunErrorFlag, frameErrorFlag};
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