URL
https://opencores.org/ocsvn/iso7816_3_master/iso7816_3_master/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 5 |
Rev 6 |
| Line 3... |
Line 3... |
|
|
module FiDiAnalyzer(
|
module FiDiAnalyzer(
|
input wire [3:0] fiCode,
|
input wire [3:0] fiCode,
|
input wire [3:0] diCode,
|
input wire [3:0] diCode,
|
output wire [12:0] fi,
|
output wire [12:0] fi,
|
output wire [7:0] di,
|
output reg [7:0] di,
|
output wire [12:0] cyclesPerEtu, //truncate values to 'floor' integer value
|
output reg [12:0] cyclesPerEtu, //truncate values to 'floor' integer value
|
output wire [7:0] fMax //in 0.1MHz units
|
output wire [7:0] fMax //in 0.1MHz units
|
);
|
);
|
|
|
wire [13+8] fiStuff;
|
reg [13+8:0] fiStuff;
|
assign {fi,fMax} = fiStuff;
|
assign {fi,fMax} = fiStuff;
|
always @(*) begin:fiBlock
|
always @(*) begin:fiBlock
|
case(fiCode)
|
case(fiCode)
|
4'b0000: fiStuff = {12'd0372,8'd040};
|
4'b0000: fiStuff = {12'd0372,8'd040};
|
4'b0001: fiStuff = {12'd0372,8'd050};
|
4'b0001: fiStuff = {12'd0372,8'd050};
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.
