| Line 32... |
Line 32... |
cmd_div_mod_i: in std_logic;
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cmd_div_mod_i: in std_logic;
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cmd_cmp_i: in std_logic;
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cmd_cmp_i: in std_logic;
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cmd_jump_i: in std_logic;
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cmd_jump_i: in std_logic;
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cmd_negate_op2_i: in std_logic;
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cmd_negate_op2_i: in std_logic;
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cmd_and_i: in std_logic;
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cmd_and_i: in std_logic;
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cmd_or_i: in std_logic;
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cmd_xor_i: in std_logic;
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cmd_xor_i: in std_logic;
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cmd_shift_i: in std_logic;
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cmd_shift_i: in std_logic;
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cmd_shift_right_i: in std_logic;
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cmd_shift_right_i: in std_logic;
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jump_type_i: in std_logic_vector(3 downto 0);
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jump_type_i: in std_logic_vector(3 downto 0);
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| Line 64... |
Line 63... |
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jump_valid_o: out std_logic;
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jump_valid_o: out std_logic;
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jump_dst_o: out std_logic_vector(29 downto 0);
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jump_dst_o: out std_logic_vector(29 downto 0);
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jump_ready_i: in std_logic;
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jump_ready_i: in std_logic;
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interrupt_return_o: out std_logic;
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interrupt_return_o: out std_logic
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interrupts_enabled_o: out std_logic_vector(7 downto 0);
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interrupts_blocked_o: out std_logic_vector(7 downto 0)
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);
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);
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end entity;
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end entity;
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architecture rtl of lxp32_execute is
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architecture rtl of lxp32_execute is
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| Line 114... |
Line 111... |
signal dst_reg: std_logic_vector(7 downto 0);
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signal dst_reg: std_logic_vector(7 downto 0);
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-- Signals related to interrupt handling
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-- Signals related to interrupt handling
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signal interrupt_return: std_logic:='0';
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signal interrupt_return: std_logic:='0';
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signal interrupts_enabled: std_logic_vector(7 downto 0):=(others=>'0');
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signal interrupts_blocked: std_logic_vector(7 downto 0):=(others=>'0');
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begin
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begin
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-- Pipeline control
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-- Pipeline control
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| Line 146... |
Line 141... |
cmd_div_i=>cmd_div_i,
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cmd_div_i=>cmd_div_i,
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cmd_div_mod_i=>cmd_div_mod_i,
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cmd_div_mod_i=>cmd_div_mod_i,
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cmd_cmp_i=>cmd_cmp_i,
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cmd_cmp_i=>cmd_cmp_i,
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cmd_negate_op2_i=>cmd_negate_op2_i,
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cmd_negate_op2_i=>cmd_negate_op2_i,
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cmd_and_i=>cmd_and_i,
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cmd_and_i=>cmd_and_i,
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cmd_or_i=>cmd_or_i,
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cmd_xor_i=>cmd_xor_i,
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cmd_xor_i=>cmd_xor_i,
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cmd_shift_i=>cmd_shift_i,
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cmd_shift_i=>cmd_shift_i,
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cmd_shift_right_i=>cmd_shift_right_i,
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cmd_shift_right_i=>cmd_shift_right_i,
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op1_i=>op1_i,
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op1_i=>op1_i,
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| Line 180... |
Line 174... |
begin
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begin
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if rising_edge(clk_i) then
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if rising_edge(clk_i) then
|
if rst_i='1' then
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if rst_i='1' then
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jump_valid<='0';
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jump_valid<='0';
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interrupt_return<='0';
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interrupt_return<='0';
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jump_dst<=(others=>'-');
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else
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else
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if jump_valid='0' then
|
if jump_valid='0' then
|
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jump_dst<=op1_i(31 downto 2);
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if can_execute='1' and cmd_jump_i='1' and jump_condition='1' then
|
if can_execute='1' and cmd_jump_i='1' and jump_condition='1' then
|
jump_valid<='1';
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jump_valid<='1';
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jump_dst<=op1_i(31 downto 2);
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interrupt_return<=op1_i(0);
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interrupt_return<=op1_i(0);
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end if;
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end if;
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elsif jump_ready_i='1' then
|
elsif jump_ready_i='1' then
|
jump_valid<='0';
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jump_valid<='0';
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interrupt_return<='0';
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interrupt_return<='0';
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| Line 260... |
Line 255... |
|
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sp_we_o<=result_valid;
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sp_we_o<=result_valid;
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sp_waddr_o<=result_regaddr;
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sp_waddr_o<=result_regaddr;
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sp_wdata_o<=result_mux;
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sp_wdata_o<=result_mux;
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|
|
process (clk_i) is
|
|
begin
|
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if rising_edge(clk_i) then
|
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if rst_i='1' then
|
|
interrupts_enabled<=(others=>'0');
|
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interrupts_blocked<=(others=>'0');
|
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else
|
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if result_valid='1' and result_regaddr=X"FC" then
|
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interrupts_enabled<=result_mux(7 downto 0);
|
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interrupts_blocked<=result_mux(15 downto 8);
|
|
end if;
|
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end if;
|
|
end if;
|
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end process;
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|
|
interrupts_enabled_o<=interrupts_enabled;
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interrupts_blocked_o<=interrupts_blocked;
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|
|
|
end architecture;
|
end architecture;
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No newline at end of file
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No newline at end of file
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