Subversion Repositories lxp32

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-- A basic parallel 16x16 multiplier with an output register

-- A basic parallel 16x16 multiplier with an output register

--

--

-- Part of the LXP32 CPU

-- Part of the LXP32 CPU

--

--

-- Copyright (c) 2016 by Alex I. Kuznetsov

-- Copyright (c) 2016 by Alex I. Kuznetsov

--

--

-- A straightforward behavioral description. Can be replaced

-- A straightforward behavioral description. Can be replaced

-- with a library component wrapper if needed.

-- with a library component wrapper if needed.

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library ieee;

library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_1164.all;

use ieee.numeric_std.all;

use ieee.numeric_std.all;

entity lxp32_mul16x16 is

entity lxp32_mul16x16 is

        port(

        port(

                clk_i: in std_logic;

                clk_i: in std_logic;

                a_i: in std_logic_vector(15 downto 0);

                a_i: in std_logic_vector(15 downto 0);

                b_i: in std_logic_vector(15 downto 0);

                b_i: in std_logic_vector(15 downto 0);

                p_o: out std_logic_vector(31 downto 0)

                p_o: out std_logic_vector(31 downto 0)

        );

        );

end entity;

end entity;

architecture rtl of lxp32_mul16x16 is

architecture rtl of lxp32_mul16x16 is

begin

begin

process (clk_i) is

process (clk_i) is

begin

begin

        if rising_edge(clk_i) then

        if rising_edge(clk_i) then

                p_o<=std_logic_vector(unsigned(a_i)*unsigned(b_i));

                p_o<=std_logic_vector(unsigned(a_i)*unsigned(b_i));

        end if;

        end if;

end process;

end process;

end architecture;

end architecture;