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Rev 9 |
/*
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/*
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* This test verifies bytewise DBUS access
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* This test verifies bytewise DBUS access
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*/
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*/
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lc r100, 0x10000000 // test result output pointer
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lc r100, 0x10000000 // test result output pointer
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lc r101, halt
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lc r101, halt
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lc r102, failure
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lc r102, failure
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lc r16, 0x10000004 // output pointer
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lc r16, 0x10000004 // output pointer
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lc r17, data // input pointer
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lc r17, data // input pointer
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// Check for bytewise read
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// Check for bytewise read
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lc r18, 0xbc
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lc r18, 0xbc
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lc r19, 0x9a
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lc r19, 0x9a
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lc r20, 0x78
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lc r20, 0x78
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lc r21, 0x56
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lc r21, 0x56
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lc r22, 0xffffffbc
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lc r22, 0xffffffbc
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lc r23, 0xffffff9a
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lc r23, 0xffffff9a
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lc r24, 0x78
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lc r24, 0x78
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lc r25, 0x56
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lc r25, 0x56
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lub r0, r17
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lub r0, r17
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sw r16, r0
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sw r16, r0
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cjmpne r102, r0, r18
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cjmpne r102, r0, r18
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add r17, r17, 1
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add r17, r17, 1
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lub r0, r17
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lub r0, r17
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sw r16, r0
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sw r16, r0
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cjmpne r102, r0, r19
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cjmpne r102, r0, r19
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add r17, r17, 1
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add r17, r17, 1
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lub r0, r17
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lub r0, r17
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sw r16, r0
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sw r16, r0
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cjmpne r102, r0, r20
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cjmpne r102, r0, r20
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add r17, r17, 1
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add r17, r17, 1
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lub r0, r17
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lub r0, r17
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sw r16, r0
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sw r16, r0
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cjmpne r102, r0, r21
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cjmpne r102, r0, r21
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sub r17, r17, 3
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sub r17, r17, 3
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lsb r0, r17
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lsb r0, r17
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sw r16, r0
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sw r16, r0
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cjmpne r102, r0, r22
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cjmpne r102, r0, r22
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add r17, r17, 1
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add r17, r17, 1
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lsb r0, r17
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lsb r0, r17
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sw r16, r0
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sw r16, r0
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cjmpne r102, r0, r23
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cjmpne r102, r0, r23
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add r17, r17, 1
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add r17, r17, 1
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lsb r0, r17
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lsb r0, r17
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sw r16, r0
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sw r16, r0
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cjmpne r102, r0, r24
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cjmpne r102, r0, r24
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add r17, r17, 1
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add r17, r17, 1
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lsb r0, r17
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lsb r0, r17
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sw r16, r0
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sw r16, r0
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cjmpne r102, r0, r25
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cjmpne r102, r0, r25
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// Check for bytewise write
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// Check for bytewise write
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lc r17, 0x00008004
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lc r17, 0x00008004
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sb r17, 0x12
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sb r17, 0x12
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add r17, r17, 1
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add r17, r17, 1
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sb r17, 0x34
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sb r17, 0x34
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add r17, r17, 1
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add r17, r17, 1
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sb r17, 0x56
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sb r17, 0x56
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add r17, r17, 1
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add r17, r17, 1
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sb r17, 0x78
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sb r17, 0x78
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// Read the whole word and compare
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// Read the whole word and compare
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sub r17, r17, 3
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sub r17, r17, 3
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lw r0, r17
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lw r0, r17
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lc r18, 0x78563412
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lc r18, 0x78563412
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cjmpne r102, r0, r18
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cjmpne r102, r0, r18
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sw r100, 1
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sw r100, 1
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jmp r101
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jmp r101
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failure:
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failure:
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sw r100, 2
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sw r100, 2
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halt:
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halt:
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hlt
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hlt
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jmp r101
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jmp r101
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data:
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data:
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.word 0x56789ABC
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.word 0x56789ABC
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