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https://opencores.org/ocsvn/lxp32/lxp32/trunk
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Rev 12 |
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Line 36... |
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architecture rtl of coprocessor is
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architecture rtl of coprocessor is
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signal value: unsigned(31 downto 0):=(others=>'0');
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signal value: unsigned(31 downto 0):=(others=>'0');
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signal result: unsigned(31 downto 0):=(others=>'0');
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signal result: unsigned(31 downto 0):=(others=>'0');
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signal cnt: integer range 0 to 5:=0;
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signal cnt: integer range 0 to 50:=0;
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signal irq: std_logic:='0';
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signal irq: std_logic:='0';
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begin
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begin
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process (clk_i) is
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process (clk_i) is
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| Line 65... |
Line 65... |
for i in wbs_sel_i'range loop
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for i in wbs_sel_i'range loop
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if wbs_sel_i(i)='1' then
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if wbs_sel_i(i)='1' then
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if wbs_adr_i="00"&X"000000" then
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if wbs_adr_i="00"&X"000000" then
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value(i*8+7 downto i*8)<=
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value(i*8+7 downto i*8)<=
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unsigned(wbs_dat_i(i*8+7 downto i*8));
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unsigned(wbs_dat_i(i*8+7 downto i*8));
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cnt<=5;
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cnt<=50;
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end if;
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end if;
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end if;
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end if;
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end loop;
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end loop;
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end if;
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end if;
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end if;
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end if;
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