| Line 6... |
Line 6... |
-- Copyright (c) 2016 by Alex I. Kuznetsov
|
-- Copyright (c) 2016 by Alex I. Kuznetsov
|
--
|
--
|
-- Simulates LXP32 test platform, verifies results.
|
-- Simulates LXP32 test platform, verifies results.
|
--
|
--
|
-- Parameters:
|
-- Parameters:
|
|
-- CPU_DBUS_RMW: DBUS_RMW CPU generic
|
|
-- CPU_MUL_ARCH: MUL_ARCH CPU generic
|
-- MODEL_LXP32C: when true, simulates LXP32C variant (with
|
-- MODEL_LXP32C: when true, simulates LXP32C variant (with
|
-- instruction cache), otherwise LXP32U
|
-- instruction cache), otherwise LXP32U
|
-- TEST_CASE: If non-empty, selects a test case to run.
|
-- TEST_CASE: If non-empty, selects a test case to run.
|
-- If empty, all tests are executed.
|
-- If empty, all tests are executed.
|
-- THROTTLE_IBUS: perform pseudo-random instruction bus
|
-- THROTTLE_IBUS: perform pseudo-random instruction bus
|
| Line 27... |
Line 29... |
|
|
use work.tb_pkg.all;
|
use work.tb_pkg.all;
|
|
|
entity tb is
|
entity tb is
|
generic(
|
generic(
|
|
CPU_DBUS_RMW: boolean:=false;
|
|
CPU_MUL_ARCH: string:="dsp";
|
MODEL_LXP32C: boolean:=true;
|
MODEL_LXP32C: boolean:=true;
|
TEST_CASE: string:="";
|
TEST_CASE: string:="";
|
THROTTLE_DBUS: boolean:=true;
|
THROTTLE_DBUS: boolean:=true;
|
THROTTLE_IBUS: boolean:=true;
|
THROTTLE_IBUS: boolean:=true;
|
VERBOSE: boolean:=false
|
VERBOSE: boolean:=false
|
| Line 53... |
Line 57... |
|
|
begin
|
begin
|
|
|
dut: entity work.platform(rtl)
|
dut: entity work.platform(rtl)
|
generic map(
|
generic map(
|
|
CPU_DBUS_RMW=>CPU_DBUS_RMW,
|
|
CPU_MUL_ARCH=>CPU_MUL_ARCH,
|
MODEL_LXP32C=>MODEL_LXP32C,
|
MODEL_LXP32C=>MODEL_LXP32C,
|
THROTTLE_DBUS=>THROTTLE_DBUS,
|
THROTTLE_DBUS=>THROTTLE_DBUS,
|
THROTTLE_IBUS=>THROTTLE_IBUS
|
THROTTLE_IBUS=>THROTTLE_IBUS
|
)
|
)
|
port map(
|
port map(
|
| Line 123... |
Line 129... |
run_test("test012.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test("test012.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test("test013.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test("test013.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test("test014.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test("test014.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test("test015.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test("test015.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test("test016.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test("test016.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
|
run_test("test017.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
|
run_test("test018.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
|
run_test("test019.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
|
run_test("test020.ram",clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
else
|
else
|
run_test(TEST_CASE,clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
run_test(TEST_CASE,clk,globals,soc_wbs_in,soc_wbs_out,monitor_out);
|
end if;
|
end if;
|
|
|
report "ALL TESTS WERE COMPLETED SUCCESSFULLY";
|
report "ALL TESTS WERE COMPLETED SUCCESSFULLY";
|
