URL https://opencores.org/ocsvn/m1_core/m1_core/trunk

Subversion Repositories m1_core

[/] [m1_core/] [trunk/] [hdl/] [behav/] [testbench/] [testbench.v] - Diff between revs 54 and 64

Rev 54	Rev 64
Line 1...	Line 1...
`/*`	`/*`
`* Simply RISC M1 Core Testbench`	`* M1 Core Testbench`
`*/`	`*/`

`include "ddr_include.v"	`include "ddr_include.v"

`module testbench();`	`module testbench();`
Line 118...	Line 118...

`// Reset`	`// Reset`
`initial begin`	`initial begin`

`// Display start message`	`// Display start message`
`$display("INFO: TBENCH(%m): Starting Simply RISC M1 Core simulation...");`	`$display("INFO: TBENCH(%m): Starting M1 Core simulation...");`

`// Create VCD trace file`	`// Create VCD trace file`
`$dumpfile("trace.vcd");`	`$dumpfile("trace.vcd");`
`$dumpvars();`	`$dumpvars();`

Line 130...	Line 130...
`sys_clock <= 1;`	`sys_clock <= 1;`
`sys_reset <= 1;`	`sys_reset <= 1;`
`#1000`	`#1000`
`sys_reset <= 0;`	`sys_reset <= 0;`
`#99000`	`#99000`
`$display("INFO: TBENCH(%m): Completed Simply RISC M1 Core simulation!");`	`$display("INFO: TBENCH(%m): Completed M1 Core simulation!");`
`$finish;`	`$finish;`

`end`	`end`

`endmodule`	`endmodule`