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https://opencores.org/ocsvn/m1_core/m1_core/trunk
[/] [m1_core/] [trunk/] [hdl/] [filelist.dc] - Diff between revs 54 and 58
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Rev 58 |
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# Synthesis script for dc_shell (Tcl mode)
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# Synthesis script for dc_shell (Tcl mode)
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# Analyze
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# Analyze
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analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_alu.v
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analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_alu.v
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analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_mul.v
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analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_mul.v
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analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_div.v
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analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_div.v
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analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_cpu.v
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analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_cpu.v
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analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_mmu.v
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analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_mmu.v
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analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_core.v
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analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_core.v
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# Technology-independent elaboration and linking
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# Technology-independent elaboration and linking
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set active_design m1_core
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set active_design m1_core
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elaborate $active_design
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elaborate $active_design
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