| Line 654... |
Line 654... |
out_alu = right - left; // neg (right=0)
|
out_alu = right - left; // neg (right=0)
|
alu_com:
|
alu_com:
|
out_alu = ~left;
|
out_alu = ~left;
|
alu_clr, alu_ld8, alu_ld16:
|
alu_clr, alu_ld8, alu_ld16:
|
out_alu = right; // clr, ld
|
out_alu = right; // clr, ld
|
alu_st8, alu_st16:
|
alu_st8, alu_tst, alu_st16:
|
out_alu = left;
|
out_alu = left;
|
alu_daa:
|
alu_daa:
|
out_alu = left + {8'b00000000, daa_reg};
|
out_alu = left + {8'b00000000, daa_reg};
|
alu_tpa:
|
alu_tpa:
|
out_alu = {8'b00000000, cc};
|
out_alu = {8'b00000000, cc};
|
| Line 695... |
Line 695... |
else
|
else
|
cc_out[CBIT] = 1'b0;
|
cc_out[CBIT] = 1'b0;
|
end
|
end
|
alu_sec:
|
alu_sec:
|
cc_out[CBIT] = 1'b1;
|
cc_out[CBIT] = 1'b1;
|
alu_clc:
|
alu_clc, alu_tst:
|
cc_out[CBIT] = 1'b0;
|
cc_out[CBIT] = 1'b0;
|
alu_tap:
|
alu_tap:
|
cc_out[CBIT] = left[CBIT];
|
cc_out[CBIT] = left[CBIT];
|
default:
|
default:
|
cc_out[CBIT] = cc[CBIT];
|
cc_out[CBIT] = cc[CBIT];
|
| Line 712... |
Line 712... |
alu_adc , alu_sbc ,
|
alu_adc , alu_sbc ,
|
alu_and , alu_ora , alu_eor ,
|
alu_and , alu_ora , alu_eor ,
|
alu_inc , alu_dec ,
|
alu_inc , alu_dec ,
|
alu_neg , alu_com , alu_clr ,
|
alu_neg , alu_com , alu_clr ,
|
alu_rol8 , alu_ror8 , alu_asr8 , alu_asl8 , alu_lsr8 ,
|
alu_rol8 , alu_ror8 , alu_asr8 , alu_asl8 , alu_lsr8 ,
|
alu_ld8 , alu_st8:
|
alu_ld8 , alu_st8, alu_tst:
|
cc_out[ZBIT] = ~( out_alu[7] | out_alu[6] | out_alu[5] | out_alu[4] |
|
cc_out[ZBIT] = ~( out_alu[7] | out_alu[6] | out_alu[5] | out_alu[4] |
|
out_alu[3] | out_alu[2] | out_alu[1] | out_alu[0] );
|
out_alu[3] | out_alu[2] | out_alu[1] | out_alu[0] );
|
alu_add16, alu_sub16,
|
alu_add16, alu_sub16,
|
alu_lsl16, alu_lsr16,
|
alu_lsl16, alu_lsr16,
|
alu_inx, alu_dex,
|
alu_inx, alu_dex,
|
| Line 738... |
Line 738... |
alu_add8, alu_sub8,
|
alu_add8, alu_sub8,
|
alu_adc, alu_sbc,
|
alu_adc, alu_sbc,
|
alu_and, alu_ora, alu_eor,
|
alu_and, alu_ora, alu_eor,
|
alu_rol8, alu_ror8, alu_asr8, alu_asl8, alu_lsr8,
|
alu_rol8, alu_ror8, alu_asr8, alu_asl8, alu_lsr8,
|
alu_inc, alu_dec, alu_neg, alu_com, alu_clr,
|
alu_inc, alu_dec, alu_neg, alu_com, alu_clr,
|
alu_ld8 , alu_st8:
|
alu_ld8 , alu_st8, alu_tst:
|
cc_out[NBIT] = out_alu[7];
|
cc_out[NBIT] = out_alu[7];
|
alu_add16, alu_sub16,
|
alu_add16, alu_sub16,
|
alu_lsl16, alu_lsr16,
|
alu_lsl16, alu_lsr16,
|
alu_ld16, alu_st16:
|
alu_ld16, alu_st16:
|
cc_out[NBIT] = out_alu[15];
|
cc_out[NBIT] = out_alu[15];
|
| Line 813... |
Line 813... |
alu_rol8, alu_asl8:
|
alu_rol8, alu_asl8:
|
cc_out[VBIT] = left[7] ^ left[6];
|
cc_out[VBIT] = left[7] ^ left[6];
|
alu_tap:
|
alu_tap:
|
cc_out[VBIT] = left[VBIT];
|
cc_out[VBIT] = left[VBIT];
|
alu_and, alu_ora, alu_eor, alu_com,
|
alu_and, alu_ora, alu_eor, alu_com,
|
alu_st8, alu_st16, alu_ld8, alu_ld16,
|
alu_st8, alu_tst, alu_st16, alu_ld8, alu_ld16,
|
alu_clv:
|
alu_clv:
|
cc_out[VBIT] = 1'b0;
|
cc_out[VBIT] = 1'b0;
|
alu_sev:
|
alu_sev:
|
cc_out[VBIT] = 1'b1;
|
cc_out[VBIT] = 1'b1;
|
default:
|
default:
|
| Line 2065... |
Line 2065... |
cc_ctrl = load_cc;
|
cc_ctrl = load_cc;
|
end
|
end
|
4'b1101: // tst
|
4'b1101: // tst
|
begin
|
begin
|
right_ctrl = zero_right;
|
right_ctrl = zero_right;
|
alu_ctrl = alu_st8;
|
alu_ctrl = alu_tst;
|
acca_ctrl = latch_acca;
|
acca_ctrl = latch_acca;
|
cc_ctrl = load_cc;
|
cc_ctrl = load_cc;
|
end
|
end
|
4'b1110: // jmp
|
4'b1110: // jmp
|
begin
|
begin
|
| Line 2179... |
Line 2179... |
cc_ctrl = load_cc;
|
cc_ctrl = load_cc;
|
end
|
end
|
4'b1101: // tst
|
4'b1101: // tst
|
begin
|
begin
|
right_ctrl = zero_right;
|
right_ctrl = zero_right;
|
alu_ctrl = alu_st8;
|
alu_ctrl = alu_tst;
|
accb_ctrl = latch_accb;
|
accb_ctrl = latch_accb;
|
cc_ctrl = load_cc;
|
cc_ctrl = load_cc;
|
end
|
end
|
4'b1110: // jmp
|
4'b1110: // jmp
|
begin
|
begin
|
| Line 3576... |
Line 3576... |
end
|
end
|
4'b1101: // tst
|
4'b1101: // tst
|
begin
|
begin
|
left_ctrl = md_left;
|
left_ctrl = md_left;
|
right_ctrl = zero_right;
|
right_ctrl = zero_right;
|
alu_ctrl = alu_st8;
|
alu_ctrl = alu_tst;
|
cc_ctrl = load_cc;
|
cc_ctrl = load_cc;
|
md_ctrl = latch_md;
|
md_ctrl = latch_md;
|
next_state = fetch_state;
|
next_state = fetch_state;
|
end
|
end
|
4'b1110: // jmp
|
4'b1110: // jmp
|
