| Line 50... |
Line 50... |
signal it_mat_clk : std_logic; -- Synchronised hardware interruption
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signal it_mat_clk : std_logic; -- Synchronised hardware interruption
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signal stop_pf : std_logic; -- Lock the pc
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signal stop_pf : std_logic; -- Lock the pc
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signal stop_pf2 : std_logic; -- Lock the pc
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signal stop_pf2 : std_logic; -- Lock the pc
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signal genop : std_logic; -- envoi de nops
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signal genop : std_logic; -- envoi de nops
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signal genop2 : std_logic; -- envoi de nops
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signal genop2 : std_logic; -- envoi de nops
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signal clock_out1, clock_out2 : std_logic; -- sem uso atual
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-- interface PF - EI
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-- interface PF - EI
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signal PF_pc : bus32; -- PC value
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signal PF_pc : bus32; -- PC value
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signal PF_pc_4 : bus32;
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signal PF_pc_4 : bus32;
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-- interface Controler - EI
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-- interface Controler - EI
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| Line 379... |
Line 378... |
);
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);
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U4_ex : pps_ex port map (
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U4_ex : pps_ex port map (
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clock => clock,
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clock => clock,
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clock2 => clock,
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clock2 => clock2,
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reset => reset,
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reset => reset,
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stop_all => stop_all,
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stop_all => stop_all,
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stop_all2 => stop_all2, -- Unconditionnal locking of outputs
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stop_all2 => stop_all2, -- Unconditionnal locking of outputs
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clear => interrupt, -- Clear the pipeline stage
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clear => interrupt, -- Clear the pipeline stage
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| Line 824... |
Line 823... |
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-- Pipeline progress control signal
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-- Pipeline progress control signal
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stop_all => stop_all2
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stop_all => stop_all2
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);
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);
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U14_clock_gate : clock_gate port map (
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U14_delay_gate : delay_gate port map (
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clock_in1 => clock,
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clock_in2 => clock2,
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clock_out1 => clock_out1,
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clock_out2 => clock_out2,
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gate1 => zero,
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gate2 => zero
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);
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U15_delay_gate : delay_gate port map (
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clock => clock,
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clock => clock,
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in1 => DI_bra,
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in1 => DI_bra,
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in2 => bra_detect,
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in2 => bra_detect,
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in3 => EX_bra_confirm,
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in3 => EX_bra_confirm,
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in4 => alea,
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in4 => alea,
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