OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [bench/] [verilog/] [vpi/] [dbg_comm_vpi.v] - Diff between revs 2 and 71

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 2 Rev 71
Line 72... Line 72...
//
//
//
//
//
//
//
//
 
 
 
`include "timescale.v"
 
 
`define JP_PORT "4567"
`define JP_PORT "4567"
`define TIMEOUT_COUNT 6'd20  // 1/2 of a TCK clock will be this many SYS_CLK ticks.  Must be less than 6 bits. 
`define TIMEOUT_COUNT 6'd20  // 1/2 of a TCK clock will be this many SYS_CLK ticks.  Must be less than 6 bits. 
 
 
  module dbg_comm_vpi (
  module dbg_comm_vpi (

powered by: WebSVN 2.1.0

© copyright 1999-2021 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.