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[/] [minsoc/] [trunk/] [rtl/] [verilog/] [xilinx_dcm.v] - Diff between revs 88 and 173

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Rev 88 Rev 173
Line 29... Line 29...
 
 
`ifdef SPARTAN3E
`ifdef SPARTAN3E
        `define XILINX_DCM_SP
        `define XILINX_DCM_SP
`elsif SPARTAN3A
`elsif SPARTAN3A
        `define XILINX_DCM_SP
        `define XILINX_DCM_SP
 
`elsif SPARTAN6
 
        `define XILINX_DCM_SP
`endif  // !SPARTAN3E/SPARTAN3A
`endif  // !SPARTAN3E/SPARTAN3A
 
 
`ifdef VIRTEX4
`ifdef VIRTEX4
        `define XILINX_DCM_ADV
        `define XILINX_DCM_ADV
        `define XILINX_DCM_COMPONENT "VIRTEX4"
        `define XILINX_DCM_COMPONENT "VIRTEX4"

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