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[/] [minsoc/] [trunk/] [syn/] [altera/] [Makefile] - Diff between revs 93 and 95

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Rev 93 Rev 95
MINSOC = ..
MINSOC = ..
MINSOC_DEFINES = ${MINSOC}/backend
MINSOC_DEFINES = ${MINSOC}/backend
MINSOC_RTL = ${MINSOC}/rtl/verilog
MINSOC_RTL = ${MINSOC}/rtl/verilog
MINSOC_STARTUP_RTL = ${MINSOC_RTL}/minsoc_startup
MINSOC_STARTUP_RTL = ${MINSOC_RTL}/minsoc_startup
UART_RTL = ${MINSOC_RTL}/uart16550/rtl/verilog
UART_RTL = ${MINSOC_RTL}/uart16550/rtl/verilog
ADV_DEBUG_ROOT = ${MINSOC_RTL}/adv_debug_sys/Hardware
ADV_DEBUG_ROOT = ${MINSOC_RTL}/adv_debug_sys/Hardware
DEBUG_RTL = ${ADV_DEBUG_ROOT}/adv_dbg_if/rtl/verilog
DEBUG_RTL = ${ADV_DEBUG_ROOT}/adv_dbg_if/rtl/verilog
OR1200_RTL = ${MINSOC_RTL}/or1200/rtl/verilog
OR1200_RTL = ${MINSOC_RTL}/or1200/rtl/verilog
ETH_RTL = ${MINSOC_RTL}/ethmac/rtl/verilog
ETH_RTL = ${MINSOC_RTL}/ethmac/rtl/verilog
BUILD_SUPPORT = $(MINSOC)/syn/buildSupport
BUILD_SUPPORT = $(MINSOC)/syn/buildSupport
PROJECT_DIR = $(MINSOC)/prj/altera
PROJECT_DIR = $(MINSOC)/prj/altera
 
QSF_FILE = $(BUILD_SUPPORT)/minsoc_top
help:
help:
        @echo "  all: Synthesize and implement the SoC, then generate a bit stream"
        @echo "  all: Synthesize and implement the SoC, then generate a bit stream"
        @echo ""
        @echo ""
        @echo "  bitgen: Generate a programming file for the target FPGA"
        @echo "  bitgen: Generate a programming file for the target FPGA"
        @echo "  map: Express the SoC netlist in the target hardware"
        @echo "  map: Express the SoC netlist in the target hardware"
        @echo "  fit: Place the target hardware, then route the wires"
        @echo "  fit: Place the target hardware, then route the wires"
        @echo "  sta: Perfom a timming analysis"
        @echo "  sta: Perfom a timming analysis"
        @echo "  eda: Generate a netlist of the hardware"
        @echo "  eda: Generate a netlist of the hardware"
 
        @echo "  config: Load the bitstream into the device using ALTERA USB Blaster and JTAG configuration"
        @echo ""
        @echo ""
        @echo "  clean: Delete all superfluous files generated by Altera tools"
        @echo "  clean: Delete all superfluous files generated by Altera tools"
        @echo "  distclean: Delete all generated files"
        @echo "  distclean: Delete all generated files"
all: bitgen eda sta
all: bitgen eda sta
map: minsoc_top.map.summary
map: $(BUILD_SUPPORT)/minsoc_top.map.summary
fit: minsoc_top.fit.summary
fit: $(BUILD_SUPPORT)/minsoc_top.fit.summary
bitgen: minsoc_top.sof
bitgen: minsoc_top.sof
eda: minsoc_top.eda.summary
eda: $(BUILD_SUPPORT)/minsoc_top.eda.summary
sta: minsoc_top.sta.summary
sta: $(BUILD_SUPPORT)/minsoc_top.sta.summary
 
 
#minsoc_top.map.summary: ${MINSOC_RTL}/*.v $(UART_RTL)/*.v $(ADV_DEBUG_ROOT)/*.v  $(DEBUG_RTL)/*.v $(OR1200_RTL)/*.v  $(ETH_RTL)/*.v ${MINSOC_DEFINES}/minsoc_defines.v minsoc_top.qsf
#minsoc_top.map.summary: ${MINSOC_RTL}/*.v $(UART_RTL)/*.v $(ADV_DEBUG_ROOT)/*.v  $(DEBUG_RTL)/*.v $(OR1200_RTL)/*.v  $(ETH_RTL)/*.v ${MINSOC_DEFINES}/minsoc_defines.v minsoc_top.qsf
minsoc_top.map.summary: ${MINSOC_DEFINES}/minsoc_defines.v minsoc_top.qsf
$(BUILD_SUPPORT)/minsoc_top.map.summary: ${MINSOC_DEFINES}/minsoc_defines.v $(BUILD_SUPPORT)/minsoc_top.qsf
 
 
 
        quartus_map $(QSF_FILE) --write_settings_files=off
 
 
        quartus_map minsoc_top --write_settings_files=off
$(BUILD_SUPPORT)/minsoc_top.fit.summary: $(BUILD_SUPPORT)/minsoc_top.map.summary
 
        quartus_fit $(QSF_FILE) --write_Settings_files=off --pack_register=minimize_area
 
 
minsoc_top.fit.summary: minsoc_top.map.summary
minsoc_top.sof: $(BUILD_SUPPORT)/minsoc_top.fit.summary
        quartus_fit minsoc_top --write_Settings_files=off --pack_register=minimize_area
        quartus_asm $(QSF_FILE)
 
        mv $(BUILD_SUPPORT)/*.sof .
 
 
minsoc_top.sof: minsoc_top.fit.summary
$(BUILD_SUPPORT)/minsoc_top.sta.summary: $(BUILD_SUPPORT)/minsoc_top.fit.summary
        quartus_asm minsoc_top
        quartus_sta $(QSF_FILE)
 
 
minsoc_top.sta.summary: minsoc_top.fit.summary
$(BUILD_SUPPORT)/minsoc_top.eda.summary: $(BUILD_SUPPORT)/minsoc_top.fit.summary
        quartus_sta minsoc_top
        quartus_eda $(QSF_FILE) --write_settings_files=off
 
 
minsoc_top.eda.summary: minsoc_top.fit.summary
config: minsoc_top.sof
        quartus_eda minsoc_top --write_settings_files=off
        quartus_pgm -c USB-Blaster -m jtag -o "p;minsoc_top.sof"
 
 
distclean:
distclean:
        $(RM) *.sof
        $(RM) *.sof
        make clean
        make clean
clean:
clean:
        $(RM) *.rpt *.summary *.jdi *.smsg *.pin *.qpf
        $(RM) $(BUILD_SUPPORT)/*.rpt $(BUILD_SUPPORT)/*.summary $(BUILD_SUPPORT)/*.jdi $(BUILD_SUPPORT)/*.smsg $(BUILD_SUPPORT)/*.pin $(BUILD_SUPPORT)/*.qpf
        rm -fr db incremental_db
        $(RM) -r $(BUILD_SUPPORT)/db $(BUILD_SUPPORT)/incremental_db
 
 

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