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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/LCD_Screen - LCD
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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/LCD_Screen - LCD
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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/MIPS32 - Processor
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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/MIPS32 - Processor
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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/Memory - BRAM_592KB_Wrapper
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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/Memory - BRAM_592KB_Wrapper
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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/Switches - Switches
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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/Switches - Switches
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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/UART - uart_bootloader
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/Top C:|root|Work|Gauss|XUM_2|Hardware|XUM_Singlecore|MIPS32-Pipelined-Hw|src|Top.v/UART - uart_bootloader
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/Top C:|root|Work|Gauss|opencores_svn|mips32r1|trunk|Hardware|XUPV5-LX110T_SoC|MIPS32-Pipelined-Hw|src|Top.v
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/Top C:|root|Work|Gauss|opencores_svn|mips32r1|trunk|Hardware|XUPV5-LX110T_SoC|MIPS32-Pipelined-Hw|src|Top.v/I2C - I2C_Controller
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/Top C:|root|Work|Gauss|opencores_svn|mips32r1|trunk|Hardware|XUPV5-LX110T_SoC|MIPS32-Pipelined-Hw|src|Top.v/I2C - I2C_Controller/PHY - I2C_Phy/FIFO - FIFO_Clear
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/Top C:|root|Work|Gauss|opencores_svn|mips32r1|trunk|Hardware|XUPV5-LX110T_SoC|MIPS32-Pipelined-Hw|src|Top.v/LCD_Screen - LCD
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/Top C:|root|Work|Gauss|opencores_svn|mips32r1|trunk|Hardware|XUPV5-LX110T_SoC|MIPS32-Pipelined-Hw|src|Top.v/MIPS32 - Processor
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/Top C:|root|Work|Gauss|opencores_svn|mips32r1|trunk|Hardware|XUPV5-LX110T_SoC|MIPS32-Pipelined-Hw|src|Top.v/Switches - Switches
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/Top C:|root|Work|Gauss|opencores_svn|mips32r1|trunk|Hardware|XUPV5-LX110T_SoC|MIPS32-Pipelined-Hw|src|Top.v/UART - uart_bootloader
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/Top C:|root|Work|Gauss|opencores_svn|mips32r1|trunk|Hardware|XUPV5-LX110T_SoC|MIPS32-Pipelined-Hw|src|Top.v/UART - uart_bootloader/UART - uart_min/rx_buffer - FIFO_NoFull_Count
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/Top C:|root|Work|Gauss|opencores_svn|mips32r1|trunk|Hardware|XUPV5-LX110T_SoC|MIPS32-Pipelined-Hw|src|Top.v/UART - uart_bootloader/UART - uart_min/tx_buffer - FIFO_NoFull_Count
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PCSrcStd_Mux - Mux4 (C:/root/Work/Gauss/opencores_svn/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/Common/Mux4.v)
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Top (C:/root/Work/Gauss/opencores_svn/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/Top.v)
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0
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0
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0
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0
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000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000228000000020000000000000000000000000200000064ffffffff000000810000000300000002000002280000000100000003000000000000000100000003
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000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000000ae000000020000000000000000000000000200000064ffffffff000000810000000300000002000000ae0000000100000003000000000000000100000003
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true
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true
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PCSrcStd_Mux - Mux4 (C:/root/Work/Gauss/opencores_svn/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/Common/Mux4.v)
|
Top (C:/root/Work/Gauss/opencores_svn/mips32r1/trunk/Hardware/XUPV5-LX110T_SoC/MIPS32-Pipelined-Hw/src/Top.v)
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1
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1
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Design Utilities
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Design Utilities
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| Line 71... |
Line 80... |
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1
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1
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Configure Target Device
|
Configure Target Device
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Design Utilities
|
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Implement Design
|
Implement Design
|
Synthesize - XST
|
Synthesize - XST
|
User Constraints
|
User Constraints
|
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Configure Target Device
|
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0
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0
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0
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0
|
000000ff000000000000000100000001000000000000000000000000000000000000000000000000c9000000010000000100000000000000000000000064ffffffff000000810000000000000001000000c90000000100000000
|
000000ff000000000000000100000001000000000000000000000000000000000000000000000000c9000000010000000100000000000000000000000064ffffffff000000810000000000000001000000c90000000100000000
|
false
|
false
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Configure Target Device
|
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1
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1
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User Constraints
|
User Constraints
|
| Line 144... |
Line 152... |
0
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0
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000000ff000000000000000100000001000000000000000000000000000000000000000000000000ed000000010000000100000000000000000000000064ffffffff000000810000000000000001000000ed0000000100000000
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000000ff000000000000000100000001000000000000000000000000000000000000000000000000ed000000010000000100000000000000000000000064ffffffff000000810000000000000001000000ed0000000100000000
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false
|
false
|
Simulate Behavioral Model
|
Simulate Behavioral Model
|
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1
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0
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0
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false
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