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[/] [mips32r1/] [trunk/] [Hardware/] [XUPV5-LX110T_SoC/] [MIPS32-Pipelined-Hw/] [src/] [MIPS32/] [ALU.v] - Diff between revs 2 and 3

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Rev 2 Rev 3
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                        32'b0000_0000_0000_0000_0000_0000_0000_0001 : CLZ_Result <= 6'd31;
 
                        32'b0000_0000_0000_0000_0000_0000_0000_0001 : CLZ_Result <= 6'd31;
 
                        32'b0000_0000_0000_0000_0000_0000_0000_0000 : CLZ_Result <= 6'd32;
 
                        32'b0000_0000_0000_0000_0000_0000_0000_0000 : CLZ_Result <= 6'd32;
 
                        default : CLZ_Result <= 6'd0;
 
                        default : CLZ_Result <= 6'd0;
 
                endcase
 
                endcase
 
        end
 
        end
 
 
 
 
 
endmodule
 
endmodule
 
 
 
 
 
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