URL https://opencores.org/ocsvn/mips32r1/mips32r1/trunk

Subversion Repositories mips32r1

[/] [mips32r1/] [trunk/] [Hardware/] [XUPV5-LX110T_SoC/] [MIPS32-Pipelined-Hw/] [src/] [Top.v] - Diff between revs 3 and 12

Rev 3	Rev 12
Line 100...	Line 100...
`wire Switches_WE;`	`wire Switches_WE;`
`wire Switches_Ready;`	`wire Switches_Ready;`
`wire [7:0] Switches_DOUT;`	`wire [7:0] Switches_DOUT;`

`// Clock Generation`	`// Clock Generation`
`PLL_100MHz_to_50MHz_100MHz Clock_Generator (`	`PLL_100MHz_to_33MHz_66MHz Clock_Generator (`
`.CLKIN1_IN (clock_100MHz),`	`.CLKIN1_IN (clock_100MHz),`
`.RST_IN (1'b0),`	`.RST_IN (1'b0),`
`.CLKOUT0_OUT (clock),`	`.CLKOUT0_OUT (clock),`
`.CLKOUT1_OUT (clock2x),`	`.CLKOUT1_OUT (clock2x),`
`.LOCKED_OUT (PLL_Locked)`	`.LOCKED_OUT (PLL_Locked)`