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[/] [mod_sim_exp/] [trunk/] [rtl/] [vhdl/] [core/] [mod_sim_exp_core.vhd] - Diff between revs 37 and 39

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Rev 37 Rev 39
Line 95... Line 95...
  -- control signals
  -- control signals
  signal op_sel           : std_logic_vector(1 downto 0); -- operand selection 
  signal op_sel           : std_logic_vector(1 downto 0); -- operand selection 
  signal result_dest_op   : std_logic_vector(1 downto 0); -- result destination operand
  signal result_dest_op   : std_logic_vector(1 downto 0); -- result destination operand
  signal mult_ready       : std_logic;
  signal mult_ready       : std_logic;
  signal start_mult       : std_logic;
  signal start_mult       : std_logic;
  signal load_op          : std_logic;
 
  signal load_x         : std_logic;
  signal load_x         : std_logic;
  signal load_m           : std_logic;
 
  signal load_result      : std_logic;
  signal load_result      : std_logic;
 
 
  -- fifo signals
  -- fifo signals
  signal fifo_empty : std_logic;
  signal fifo_empty : std_logic;
  signal fifo_pop   : std_logic;
  signal fifo_pop   : std_logic;
Line 136... Line 134...
  )
  )
  port map(
  port map(
    data_in        => data_in,
    data_in        => data_in,
    data_out       => data_out,
    data_out       => data_out,
    rw_address     => rw_address,
    rw_address     => rw_address,
 
    write_enable   => write_enable,
    op_sel         => op_sel,
    op_sel         => op_sel,
    xy_out         => xy,
    xy_out         => xy,
    m              => m,
    m              => m,
    result_in      => r,
    result_in      => r,
    load_op        => load_op,
 
    load_m         => load_m,
 
    load_result    => load_result,
    load_result    => load_result,
    result_dest_op => result_dest_op,
    result_dest_op => result_dest_op,
    collision      => collision,
    collision      => collision,
    clk            => clk
    clk            => clk
  );
  );
 
 
        load_op <= write_enable when (rw_address(8) = '0') else '0';
 
        load_m <= write_enable when (rw_address(8) = '1') else '0';
 
        result_dest_op <= dest_op_single when run_auto = '0' else "11"; -- in autorun mode we always store the result in operand3
        result_dest_op <= dest_op_single when run_auto = '0' else "11"; -- in autorun mode we always store the result in operand3
 
 
  -- A fifo for auto-run operand selection
  -- A fifo for auto-run operand selection
  the_exponent_fifo : fifo_primitive
  the_exponent_fifo : fifo_primitive
  port map(
  port map(
Line 179... Line 174...
    y_sel_single     => y_sel_single,
    y_sel_single     => y_sel_single,
    run_auto         => run_auto,
    run_auto         => run_auto,
    op_buffer_empty  => fifo_empty,
    op_buffer_empty  => fifo_empty,
    op_sel_buffer    => fifo_dout,
    op_sel_buffer    => fifo_dout,
    read_buffer      => fifo_pop,
    read_buffer      => fifo_pop,
    buffer_noread    => fifo_nopop,
 
    done             => ready,
    done             => ready,
    calc_time        => calc_time,
    calc_time        => calc_time,
    op_sel           => op_sel,
    op_sel           => op_sel,
    load_x           => load_x,
    load_x           => load_x,
    load_result      => load_result,
    load_result      => load_result,

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