| Line 85... |
Line 85... |
ready : out std_logic
|
ready : out std_logic
|
);
|
);
|
end mont_multiplier;
|
end mont_multiplier;
|
|
|
architecture Structural of mont_multiplier is
|
architecture Structural of mont_multiplier is
|
|
constant t : integer := nr_stages;
|
|
constant tl : integer := stages_low;
|
constant s : integer := n/nr_stages; -- stage width (# bits)
|
constant s : integer := n/nr_stages; -- stage width (# bits)
|
|
constant nl : integer := s*tl; -- lower pipeline width (# bits)
|
|
constant nh : integer := n - nl; -- higher pipeline width (# bits)
|
|
|
signal reset_multiplier : std_logic;
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signal reset_multiplier : std_logic;
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signal start_multiplier : std_logic;
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signal start_multiplier : std_logic;
|
|
|
|
signal t_sel : integer range 0 to t; -- width in stages of selected pipeline part
|
|
signal n_sel : integer range 0 to n; -- width in bits of selected pipeline part
|
|
|
signal next_xi : std_logic;
|
signal next_xi : std_logic;
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signal xi : std_logic;
|
signal xi : std_logic;
|
|
|
signal start_first_stage : std_logic;
|
signal start_first_stage : std_logic;
|
|
|
| Line 127... |
Line 134... |
next_x => next_xi,
|
next_x => next_xi,
|
p_sel => p_sel,
|
p_sel => p_sel,
|
xi => xi
|
xi => xi
|
);
|
);
|
|
|
|
-- this module controls the pipeline operation
|
|
-- width in stages for selected pipeline
|
|
with p_sel select
|
|
t_sel <= tl when "01", -- lower pipeline part
|
|
t-tl when "10", -- higher pipeline part
|
|
t when others; -- full pipeline
|
|
|
|
-- width in bits for selected pipeline
|
|
with p_sel select
|
|
n_sel <= nl-1 when "01", -- lower pipeline part
|
|
nh-1 when "10", -- higher pipeline part
|
|
n-1 when others; -- full pipeline
|
|
|
-- stepping control logic to keep track off the multiplication and when it is done
|
-- stepping control logic to keep track off the multiplication and when it is done
|
stepping_control : stepping_logic
|
stepping_control : stepping_logic
|
generic map(
|
generic map(
|
n => n, -- max nr of steps required to complete a multiplication
|
n => n, -- max nr of steps required to complete a multiplication
|
t => nr_stages -- total nr of steps in the pipeline
|
t => nr_stages -- total nr of steps in the pipeline
|
)
|
)
|
port map(
|
port map(
|
core_clk => core_clk,
|
core_clk => core_clk,
|
start => start_multiplier,
|
start => start_multiplier,
|
reset => reset_multiplier,
|
reset => reset_multiplier,
|
t_sel => nr_stages,
|
t_sel => t_sel,
|
n_sel => n-1,
|
n_sel => n_sel,
|
start_first_stage => start_first_stage,
|
start_first_stage => start_first_stage,
|
stepping_done => ready
|
stepping_done => ready
|
);
|
);
|
|
|
systolic_array : sys_pipeline
|
systolic_array : sys_pipeline
|
