URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [README.md] - Diff between revs 23 and 24

Rev 23	Rev 24
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* `misa` CSR is read-only - no dynamic enabling/disabling of synthesized CPU extensions during runtime	* `misa` CSR is read-only - no dynamic enabling/disabling of synthesized CPU extensions during runtime
* `mcause` CSR is read-only	* `mcause` CSR is read-only
* The `[m]cycleh` and `[m]instreth` CSR counters are only 20-bit wide (in contrast to original 32-bit)	* The `[m]cycleh` and `[m]instreth` CSR counters are only 20-bit wide (in contrast to original 32-bit)
* The physical memory protection (PMP) only supports `NAPOT` mode, a minimal granularity of 8 bytes and only up to 8 regions	* The physical memory protection (PMP) only supports `NAPOT` mode, a minimal granularity of 8 bytes and only up to 8 regions
`* All invalid, unimplemented, unspecified or disabled instructions will trigger an illegal instruction exception`


`### NEORV32-Specific CPU Extensions`	`### NEORV32-Specific CPU Extensions`

The NEORV32-specific extensions are always enabled and are indicated via the `X` bit in the `misa` CSR.	The NEORV32-specific extensions are always enabled and are indicated via the `X` bit in the `misa` CSR.