URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [docs/] [attrs.adoc] - Diff between revs 73 and 74

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`:author: Dipl.-Ing. Stephan Nolting`
`:email: stnolting@gmail.com`
`:keywords: neorv32, risc-v, riscv, fpga, soft-core, vhdl, microcontroller, cpu, soc, processor, gcc, openocd, gdb`	`:keywords: neorv32, risc-v, riscv, fpga, soft-core, vhdl, microcontroller, cpu, soc, processor, gcc, openocd, gdb`
`:description: A size-optimized, customizable and open-source full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.`	`:description: A size-optimized, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.`
`:revnumber: v1.6.9`	`:revnumber: v1.7.0`
`:doctype: book`	`:doctype: book`
`:sectnums:`	`:sectnums:`
`:stem:`	`:stem:`
`:reproducible:`	`:reproducible:`
`:listing-caption: Listing`	`:listing-caption: Listing`