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[/] [neorv32/] [trunk/] [docs/] [datasheet/] [soc_spi.adoc] - Diff between revs 68 and 69

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**SPI Interrupt**
**SPI Interrupt**
 
 
The SPI module provides a single interrupt to signal "transmission done" to the CPU. Whenever the SPI
The SPI module provides a single interrupt to signal "transmission done" to the CPU. Whenever the SPI
module completes the current transfer operation, the interrupt request is set. A pending interrupt request
module completes the current transfer operation, the interrupt is triggered and has to be explicitly cleared again
is cleared by any of the following operations:
by setting the according `mip` CSR bit.
* read or write access to `NEORV32_SPI.DATA` (for example to trigger a new transmission)
 
* write access to `NEORV32_SPI.CTRL`
 
* disabling the SPI module
 
 
 
[TIP]
 
A dummy read from `NEORV32_SPI.DATA` can be executed to acknowledge the interrupt without affecting data
 
or the state of the SPI module.
 
 
 
 
 
.SPI register map (`struct NEORV32_SPI`)
.SPI register map (`struct NEORV32_SPI`)
[cols="<2,<2,<4,^1,<7"]
[cols="<2,<2,<4,^1,<7"]
[options="header",grid="all"]
[options="header",grid="all"]

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