| Line 14... |
Line 14... |
| CPU interrupts: | fast IRQ channel 7 | transmission done interrupt (see <<_processor_interrupts>>)
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| CPU interrupts: | fast IRQ channel 7 | transmission done interrupt (see <<_processor_interrupts>>)
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|=======================
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|=======================
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**Theory of Operation**
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**Theory of Operation**
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The two wire interface – also called "I²C" – is a quite famous interface for connecting several on-board
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The two wire interface - also called "I²C" - is a quite famous interface for connecting several on-board
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components. Since this interface only needs two signals (the serial data line `twi_sda_io` and the serial
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components. Since this interface only needs two signals (the serial data line `twi_sda_io` and the serial
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clock line `twi_scl_io`) – despite of the number of connected devices – it allows easy interconnections of
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clock line `twi_scl_io`) - despite of the number of connected devices - it allows easy interconnections of
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several peripheral nodes.
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several peripheral nodes.
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The NEORV32 TWI implements a **TWI controller**. It features "clock stretching" (if enabled via the control
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The NEORV32 TWI implements a **TWI controller**. It features "clock stretching" (if enabled via the control
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register), so a slow peripheral can halt the transmission by pulling the SCL line low. Currently, **no multi-controller
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register), so a slow peripheral can halt the transmission by pulling the SCL line low. Currently, **no multi-controller
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support** is available. Also, the NEORV32 TWI unit cannot operate in peripheral mode.
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support** is available. Also, the NEORV32 TWI unit cannot operate in peripheral mode.
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| Line 63... |
Line 63... |
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Based on the _TWI_CTRL_PRSCx_ configuration, the actual TWI clock frequency f~SCL~ is derived from the processor main clock f~main~ and is determined by:
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Based on the _TWI_CTRL_PRSCx_ configuration, the actual TWI clock frequency f~SCL~ is derived from the processor main clock f~main~ and is determined by:
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_**f~SCL~**_ = _f~main~[Hz]_ / (4 * `clock_prescaler`)
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_**f~SCL~**_ = _f~main~[Hz]_ / (4 * `clock_prescaler`)
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**Interrupt**
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The TWI module provides a single interrupt to singal _idle state_ (= read for new transmission) to the CPU. Whenever TWI SPI module
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is currently idle (and enabled), the interrupt request is active. A pending interrupt request is cleared
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by triggering a new TWI transmission or by disabling the device.
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.TWI register map (`struct NEORV32_TWI`)
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.TWI register map (`struct NEORV32_TWI`)
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[cols="<2,<2,<4,^1,<7"]
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[cols="<2,<2,<4,^1,<7"]
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[options="header",grid="all"]
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[options="header",grid="all"]
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|=======================
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|=======================
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| Address | Name [C] | Bit(s), Name [C] | R/W | Function
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| Address | Name [C] | Bit(s), Name [C] | R/W | Function
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