| Line 7... |
Line 7... |
|=======================
|
|=======================
|
| Hardware source file(s): | neorv32_wdt.vhd |
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| Hardware source file(s): | neorv32_wdt.vhd |
|
| Software driver file(s): | neorv32_wdt.c |
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| Software driver file(s): | neorv32_wdt.c |
|
| | neorv32_wdt.h |
|
| | neorv32_wdt.h |
|
| Top entity port: | none |
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| Top entity port: | none |
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| Configuration generics: | _IO_WDT_EN_ | implement GPIO port when _true_
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| Configuration generics: | _IO_WDT_EN_ | implement watchdog when _true_
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| CPU interrupts: | fast IRQ channel 0 | watchdog timer overflow (see <<_processor_interrupts>>)
|
| CPU interrupts: | fast IRQ channel 0 | watchdog timer overflow (see <<_processor_interrupts>>)
|
|=======================
|
|=======================
|
|
|
|
|
**Theory of Operation**
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**Theory of Operation**
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| Line 44... |
Line 44... |
WDT_CTRL_MODE bit defines the action to be taken on an overflow: When cleared, the Watchdog will assert an
|
WDT_CTRL_MODE bit defines the action to be taken on an overflow: When cleared, the Watchdog will assert an
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IRQ, when set the WDT will cause a system reset. The configured action can also be triggered manually at
|
IRQ, when set the WDT will cause a system reset. The configured action can also be triggered manually at
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any time by setting the _WDT_CTRL_FORCE_ bit. The watchdog is reset by setting the _WDT_CTRL_RESET_ bit.
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any time by setting the _WDT_CTRL_FORCE_ bit. The watchdog is reset by setting the _WDT_CTRL_RESET_ bit.
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|
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A watchdog interrupt can only occur if the watchdog is enabled and interrupt mode is enabled.
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A watchdog interrupt can only occur if the watchdog is enabled and interrupt mode is enabled.
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A triggered interrupt has to be cleared again by setting the according `mip` CSR bit.
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A triggered interrupt has to be cleared again by writing zero to the according <<_mip>> CSR bit.
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|
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The cause of the last action of the watchdog can be determined via the _WDT_CTRL_RCAUSE_ flag. If this flag is
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The cause of the last action of the watchdog can be determined via the _WDT_CTRL_RCAUSE_ flag. If this flag is
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zero, the processor has been reset via the external reset signal. If this flag is set the last system reset was
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zero, the processor has been reset via the external reset signal. If this flag is set the last system reset was
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initiated by the watchdog.
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initiated by the watchdog.
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|
|
