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A detailed description of the implemented Wishbone bus protocol and the according interface signals
A detailed description of the implemented Wishbone bus protocol and the according interface signals
can be found in the data sheet "Wishbone B4 – WISHBONE System-on-Chip (SoC) Interconnection
can be found in the data sheet "Wishbone B4 - WISHBONE System-on-Chip (SoC) Interconnection
Architecture for Portable IP Cores". A copy of this document can be found in the docs folder of this
Architecture for Portable IP Cores". A copy of this document can be found in the docs folder of this
project.
project.
 
 
**Interface Latency**
**Interface Latency**
 
 

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