| Line 61... |
Line 61... |
CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
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CPU_EXTENSION_RISCV_U : boolean := false; -- implement user mode extension?
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CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
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CPU_EXTENSION_RISCV_Zicsr : boolean := true; -- implement CSR system?
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CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
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CPU_EXTENSION_RISCV_Zifencei : boolean := true; -- implement instruction stream sync.?
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-- Physical Memory Protection (PMP) --
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-- Physical Memory Protection (PMP) --
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PMP_USE : boolean := false; -- implement PMP?
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PMP_USE : boolean := false; -- implement PMP?
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PMP_NUM_REGIONS : natural := 4; -- number of regions (max 16)
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PMP_NUM_REGIONS : natural := 4; -- number of regions (max 8)
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PMP_GRANULARITY : natural := 15; -- region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k
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PMP_GRANULARITY : natural := 14; -- minimal region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k
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-- Bus Interface --
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-- Bus Interface --
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BUS_TIMEOUT : natural := 15 -- cycles after which a valid bus access will timeout
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BUS_TIMEOUT : natural := 15 -- cycles after which a valid bus access will timeout
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);
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);
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port (
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port (
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-- global control --
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-- global control --
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| Line 135... |
Line 135... |
signal cp0_data, cp1_data : std_ulogic_vector(data_width_c-1 downto 0);
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signal cp0_data, cp1_data : std_ulogic_vector(data_width_c-1 downto 0);
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signal cp0_valid, cp1_valid : std_ulogic;
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signal cp0_valid, cp1_valid : std_ulogic;
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|
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-- pmp interface --
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-- pmp interface --
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signal pmp_addr : pmp_addr_if_t;
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signal pmp_addr : pmp_addr_if_t;
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signal pmp_maddr : pmp_addr_if_t;
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signal pmp_ctrl : pmp_ctrl_if_t;
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signal pmp_ctrl : pmp_ctrl_if_t;
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signal priv_mode : std_ulogic_vector(1 downto 0); -- current CPU privilege level
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signal priv_mode : std_ulogic_vector(1 downto 0); -- current CPU privilege level
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|
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begin
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begin
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|
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Line 151... |
if (CPU_EXTENSION_RISCV_Zicsr = false) then
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if (CPU_EXTENSION_RISCV_Zicsr = false) then
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assert false report "NEORV32 CONFIG WARNING! No exception/interrupt/machine features available when CPU_EXTENSION_RISCV_Zicsr = false." severity warning;
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assert false report "NEORV32 CONFIG WARNING! No exception/interrupt/machine features available when CPU_EXTENSION_RISCV_Zicsr = false." severity warning;
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end if;
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end if;
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-- U-extension requires Zicsr extension --
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-- U-extension requires Zicsr extension --
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if (CPU_EXTENSION_RISCV_Zicsr = false) and (CPU_EXTENSION_RISCV_U = true) then
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if (CPU_EXTENSION_RISCV_Zicsr = false) and (CPU_EXTENSION_RISCV_U = true) then
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assert false report "NEORV32 CONFIG ERROR! User mode requires CPU_EXTENSION_RISCV_Zicsr = true." severity error;
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assert false report "NEORV32 CONFIG ERROR! User mode requires CPU_EXTENSION_RISCV_Zicsr extension." severity error;
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end if;
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end if;
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-- PMP requires Zicsr extension --
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-- PMP requires Zicsr extension --
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if (CPU_EXTENSION_RISCV_Zicsr = false) and (PMP_USE = true) then
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if (CPU_EXTENSION_RISCV_Zicsr = false) and (PMP_USE = true) then
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assert false report "NEORV32 CONFIG ERROR! Physical memory protection (PMP) requires CPU_EXTENSION_RISCV_Zicsr = true." severity error;
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assert false report "NEORV32 CONFIG ERROR! Physical memory protection (PMP) requires CPU_EXTENSION_RISCV_Zicsr extension." severity error;
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end if;
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end if;
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-- performance counters requires Zicsr extension --
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-- performance counters require Zicsr extension --
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if (CPU_EXTENSION_RISCV_Zicsr = false) and (CSR_COUNTERS_USE = true) then
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if (CPU_EXTENSION_RISCV_Zicsr = false) and (CSR_COUNTERS_USE = true) then
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assert false report "NEORV32 CONFIG ERROR! Performance counter CSRs require CPU_EXTENSION_RISCV_Zicsr = true." severity error;
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assert false report "NEORV32 CONFIG ERROR! Performance counter CSRs require CPU_EXTENSION_RISCV_Zicsr extension." severity error;
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end if;
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end if;
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-- PMP regions --
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-- PMP regions --
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if (PMP_NUM_REGIONS > pmp_max_r_c) and (PMP_USE = true) then
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if (PMP_NUM_REGIONS > pmp_max_r_c) and (PMP_USE = true) then
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assert false report "NEORV32 CONFIG ERROR! Number of PMP regions out of valid range." severity error;
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assert false report "NEORV32 CONFIG ERROR! Number of PMP regions out of valid range." severity error;
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end if;
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end if;
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-- PMP granulartiy --
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-- PMP granulartiy --
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if ((PMP_GRANULARITY <= 1) or (PMP_GRANULARITY > 31)) and (PMP_USE = true) then
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if ((PMP_GRANULARITY < 1) or (PMP_GRANULARITY > 32)) and (PMP_USE = true) then
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assert false report "NEORV32 CONFIG ERROR! Invalid PMP grnaulartiy (1 < G < 32)." severity error;
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assert false report "NEORV32 CONFIG ERROR! Invalid PMP granulartiy (0 < G < 33)." severity error;
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end if;
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end if;
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end if;
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end if;
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end process sanity_check;
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end process sanity_check;
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|
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-- Control Unit ---------------------------------------------------------------------------
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-- Control Unit ---------------------------------------------------------------------------
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| Line 224... |
Line 223... |
firq_i => firq_i,
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firq_i => firq_i,
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-- system time input from MTIME --
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-- system time input from MTIME --
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time_i => time_i, -- current system time
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time_i => time_i, -- current system time
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-- physical memory protection --
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-- physical memory protection --
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pmp_addr_o => pmp_addr, -- addresses
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pmp_addr_o => pmp_addr, -- addresses
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pmp_maddr_i => pmp_maddr, -- masked addresses
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pmp_ctrl_o => pmp_ctrl, -- configs
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pmp_ctrl_o => pmp_ctrl, -- configs
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priv_mode_o => priv_mode, -- current CPU privilege level
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priv_mode_o => priv_mode, -- current CPU privilege level
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-- bus access exceptions --
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-- bus access exceptions --
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mar_i => mar, -- memory address register
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mar_i => mar, -- memory address register
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ma_instr_i => ma_instr, -- misaligned instruction address
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ma_instr_i => ma_instr, -- misaligned instruction address
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| Line 358... |
Line 356... |
ma_store_o => ma_store, -- misaligned store data address
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ma_store_o => ma_store, -- misaligned store data address
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be_load_o => be_load, -- bus error on load data access
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be_load_o => be_load, -- bus error on load data access
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be_store_o => be_store, -- bus error on store data access
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be_store_o => be_store, -- bus error on store data access
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-- physical memory protection --
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-- physical memory protection --
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pmp_addr_i => pmp_addr, -- addresses
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pmp_addr_i => pmp_addr, -- addresses
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pmp_maddr_o => pmp_maddr, -- masked addresses
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pmp_ctrl_i => pmp_ctrl, -- configs
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pmp_ctrl_i => pmp_ctrl, -- configs
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priv_mode_i => priv_mode, -- current CPU privilege level
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priv_mode_i => priv_mode, -- current CPU privilege level
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-- instruction bus --
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-- instruction bus --
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i_bus_addr_o => i_bus_addr_o, -- bus access address
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i_bus_addr_o => i_bus_addr_o, -- bus access address
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i_bus_rdata_i => i_bus_rdata_i, -- bus read data
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i_bus_rdata_i => i_bus_rdata_i, -- bus read data
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