Line 118... |
Line 118... |
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-- Operand Mux ----------------------------------------------------------------------------
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-- Operand Mux ----------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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input_op_mux: process(ctrl_i, csr_i, pc2_i, rs1_i, rs2_i, imm_i)
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input_op_mux: process(ctrl_i, csr_i, pc2_i, rs1_i, rs2_i, imm_i)
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begin
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begin
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-- opa (first ALU input operand) --
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-- operand a (first ALU input operand) --
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case ctrl_i(ctrl_alu_opa_mux_msb_c downto ctrl_alu_opa_mux_lsb_c) is
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case ctrl_i(ctrl_alu_opa_mux_msb_c downto ctrl_alu_opa_mux_lsb_c) is
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when "00" => opa <= rs1_i;
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when "00" => opa <= rs1_i;
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when "01" => opa <= pc2_i;
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when "01" => opa <= pc2_i;
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when others => opa <= csr_i;
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when others => opa <= csr_i;
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end case;
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end case;
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-- opb (second ALU input operand) --
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-- operand b (second ALU input operand) --
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if (ctrl_i(ctrl_alu_opb_mux_c) = '0') then
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if (ctrl_i(ctrl_alu_opb_mux_c) = '0') then
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opb <= rs2_i;
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opb <= rs2_i;
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else
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else
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opb <= imm_i;
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opb <= imm_i;
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end if;
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end if;
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-- opc (second operand for comparison and SUB) --
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-- operand c (third ALU input operand for comparison and SUB) --
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if (ctrl_i(ctrl_alu_opc_mux_c) = '0') then
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if (ctrl_i(ctrl_alu_opc_mux_c) = '0') then
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opc <= imm_i;
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else
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opc <= rs2_i;
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opc <= rs2_i;
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else
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opc <= imm_i;
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end if;
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end if;
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end process input_op_mux;
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end process input_op_mux;
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-- Comparator Unit ------------------------------------------------------------------------
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-- Comparator Unit ------------------------------------------------------------------------
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Line 148... |
Line 148... |
cmp_opy <= (opc(opc'left) and (not ctrl_i(ctrl_alu_unsigned_c))) & opc;
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cmp_opy <= (opc(opc'left) and (not ctrl_i(ctrl_alu_unsigned_c))) & opc;
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cmp_sub <= std_ulogic_vector(signed(cmp_opx) - signed(cmp_opy));
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cmp_sub <= std_ulogic_vector(signed(cmp_opx) - signed(cmp_opy));
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cmp_less <= cmp_sub(cmp_sub'left); -- carry (borrow) indicates a "less"
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cmp_less <= cmp_sub(cmp_sub'left); -- carry (borrow) indicates a "less"
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sub_res <= cmp_sub(data_width_c-1 downto 0); -- use the less-comparator also for SUB operations
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sub_res <= cmp_sub(data_width_c-1 downto 0); -- use the less-comparator also for SUB operations
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-- equal (x = y) --
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-- equal (for branch check only) --
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cmp_equal <= '1' when (rs1_i = opc) else '0';
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cmp_equal <= '1' when (rs1_i = rs2_i) else '0';
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-- output for branch condition evaluation -
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-- output for branch condition evaluation --
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cmp_o(alu_cmp_equal_c) <= cmp_equal;
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cmp_o(alu_cmp_equal_c) <= cmp_equal;
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cmp_o(alu_cmp_less_c) <= cmp_less;
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cmp_o(alu_cmp_less_c) <= cmp_less;
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-- Binary Adder ---------------------------------------------------------------------------
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-- Binary Adder ---------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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add_res <= std_ulogic_vector(unsigned(opa) + unsigned(opb));
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add_res <= std_ulogic_vector(unsigned(opa) + unsigned(opb));
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add_o <= add_res; -- direct output
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add_o <= add_res; -- direct output (for PC modification)
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-- Iterative Shifter Unit -----------------------------------------------------------------
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-- Iterative Shifter Unit -----------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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shifter_unit: process(rstn_i, clk_i)
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shifter_unit: process(rstn_i, clk_i)
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